Exponent encoder circuit and mask circuit

An exponent encoder circuit for outputting an output data constituted by a number of bits indicating a left shift amount as an exponent for normalizing input data having code bits showing whether the input data is a positive number or a negative number, the exponent encoder circuit comprising:

• a first logic circuit for inverting data portions of the input data other than the code bits and shifting the code bits to least significant bit positions when the input data is one of a negative number or positive number, and allowing data portions other than the code bits to pass as is and moving the code bits to least significant bit positions when the input data is the other of a negative number or a positive number;
• and
• a second logic circuit for putting a plurality of logic operation equations for obtaining each bit of an exponent from output of the first logic circuit as decided by a truth table for outputs of the first logic circuit and corresponding exponents in a form where common terms are cancelled out.