Channel coupling for an AC-3 encoder
AssigneeSTMicroelectronics Asia Pacific Pte Ltd
InventorsMohammed Javed Absar, Sapna George
Life of this patent
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Abstract
Channel coupling for an AC-3 encoder, using mixed precision computations and 16-bit coupling coefficient calculations for channels with 32-bit frequency coefficients.
Claims20
A coupling process for use in reduced bit processing, including calculating a power value of a coupled channel by normalizing frequency coefficients within a channel band to produce mantissas with respective normalization values represented by a prescribed reduced number of bits, calculating a sum of the square of the values and post-shifting the resultant sum to obtain a power value.
A signal processor for a coupling process having:
- first and second coupled channel register;
- a coupling channel means for combining frequency coefficients of the first and second coupled channel;
- a coupling coordinate calculation means including:
- normalization means for analyzing mantissas of the frequency coefficients in a channel band in each of the channels, the normalization means producing first normalization values for each respective channel represented by a prescribed number of reduced bits;
- calculation means for determining a sum of the square of values for each channel;
- shifting means for post-shifting each sum to obtain a power value for each of the channels;
- divider means for providing a mantissa quotient by dividing the post shifted sum of the first and second coupled channels by the post shifted sum of the coupling channel, reduced to a prescribed number of reduced bits;
- and
- a lookup table for providing square root values of the mantissa quotients, the square root values representing a mantissa component of the coupling coordinate of each of the first and second coupled channels.
A signal processor for a coupling process for use with a first coupled channel, the signal processor comprising:
- normalizing means for normalizing frequency coefficients of the coupled channel to produce mantissas with respective normalization values represented by a prescribed reduced number of bits;
- calculating means for calculating a sum of the square of the values;
- and
- post-shifting means for post-shifting the resultant sum to obtain a power value of the coupled channel.
Dependencies are inferred from the claim text.