Thin film transistor array substrate using low dielectric insulating layer and method of fabricating the same

A thin film transistor array substrate comprising:

• an insulating substrate;
• a first signal line formed on the insulating substrate;
• a first insulating layer formed on the first signal line;
• a second signal line formed on the first insulating layer while crossing over the first signal line;
• a thin film transistor connected to the first and the second signal lines;
• a second insulating layer formed on the thin film transistor, the second insulating layer having dielectric constant about 4.0 or less, and the second insulating layer having a first contact hole exposing a predetermined electrode of the thin film transistor;
• and
• a first pixel electrode formed on the second insulating layer while being connected to the predetermined electrode of the thin film transistor through the first contact hole,
• wherein the first insulating layer includes a top layer and a bottom layer, the bottom layer being an a-Si:O:F layer, and the top layer being a silicon nitride layer.