Numerically controlled oscillator and method for operating the same
AssigneeAltera Corporation
InventorVolker Mauer
Life of this patent
Estimating the term…
Abstract
A numerically controlled oscillator (NCO) is defined to include counter circuitry and integrator circuitry. The counter circuitry includes a first input for receiving a minimum count value, a second input for receiving a maximum count value, and a third input for receiving an increment value. The counter circuitry is defined to generate a counter digital waveform that oscillates between the minimum count value and the maximum count value with a linear slope corresponding to the increment value. The integrator circuitry is defined to compute a running integral of the counter digital waveform. The running integral of the counter digital waveform represents a sinusoidal digital waveform output of the NCO.
Claims20
A numerically controlled oscillator, comprising:
- counter circuitry including a first input for receiving a minimum count value, a second input for receiving a maximum count value, and a third input for receiving an increment value, the counter circuitry being defined to generate a counter digital waveform that oscillates between the minimum count value and the maximum count value with a linear slope corresponding to the increment value;
- and
- integrator circuitry defined to compute a running integral of the counter digital waveform, wherein the running integral of the counter digital waveform represents a sinusoidal digital waveform output of the numerically controlled oscillator.
A sinusoidal digital waveform generation circuit, comprising:
- incrementer logic defined to generate a count increment value in accordance with each cycle of a clock signal;
- counter waveform generation logic defined to receive the count increment value in accordance with each cycle of the clock signal, the counter waveform generation logic further defined to increment a running count by the count increment value received in accordance with each cycle of the clock signal, the running count representing a counter waveform;
- and
- integration logic defined to compute a running integral of the counter waveform in accordance with each cycle of the clock signal, wherein the running integral represents a sinusoidal digital waveform.
A method for generating a sinusoidal digital waveform, comprising:
- generating a symmetric sawtooth digital waveform in accordance with a clock signal, wherein the symmetric sawtooth digital waveform oscillates between a minimum value and a maximum value, each of the minimum value and the maximum value being equidistant from a value of zero;
- and
- computing a running integral of the symmetric sawtooth digital waveform in accordance with each cycle of the clock signal, the running integral of the symmetric sawtooth digital waveform representing a sinusoidal digital waveform.
Dependencies are inferred from the claim text.