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US 7,095,347 B2Granted
Digitally trimmed DAC cell
AssigneeTelASIC Communication, Inc.
InventorsErick M. Hirata, Roger N. Kosaka, Christopher B. Langit, Lloyd F. Linder
Life of this patent
Estimating the term…
Abstract
A digitally trimmed current source. The novel current source includes a first circuit for generating a current in response to an applied voltage and a resistance variable in response to a control signal, and a second circuit for supplying the control signal. The first circuit includes a resistive network comprised of a plurality of resistors; a plurality of switches, each switch coupled to one of the resistors and adapted to selectively switch the resistor in and out of the resistive network in response to the control signal; and a transistor adapted to apply a voltage across the resistive network to generate a current.
Claims29
A current source comprising:
- first means for generating a current in response to an applied voltage and a resistance variable in response to a control signal;
- and
- second means for supplying said control signal,
- wherein said first means includes a resistive network comprising a first plurality of resistors Ra, Rb, . . . , Rm,
- wherein said first plurality of resistors Ra, Rb, . . . , Rm are connected in parallel across a first node A and a second node B, and
- wherein said resistive network further includes two resistors RA and RB connected in series between node A and node B.
3 more elements
A current source comprising:
- first means for generating a current in response to an applied voltage and a resistance variable in response to a control signal;
- and
- second means for supplying said control signal,
- wherein said first means includes a resistive network comprising a first plurality of resistors Ra, Rb, . . . , Rm,
- wherein said first plurality of resistors Ra, Rb, . . . , Rm are connected in parallel across a first node A and a second node B, and
- wherein said resistive network further includes a third plurality of resistors RA, RB, . . . RL connected in series between node A and node B.
3 more elements
A current source comprising:
- two resistors R1 and R3 connected in series;
- first means for applying a voltage across said resistors R1 and R3 to generate a current I, wherein said first means includes a transistor Q, and;
- a digital to analog converter (DAC) adapted to apply a voltage or current at the node between said resistors R1 and R3 to change the current I in response to a control signal input to said DAC;
- and
- second means for supplying said control signal,
- wherein said current I is output from the collector of said transistor Q.
3 more elements
A current source comprising:
- two resistors R1 and R3 connected in series;
- first means for applying a voltage across said resistors R1 and R3 to generate a current I, wherein said first means includes a transistor Q, and;
- a digital to analog converter (DAC) adapted to apply a voltage or current at the node between said resistors R1 and R3 to change the current I in response to a control signal input to said DAC;
- and
- second means for supplying said control signal,
- wherein said resistor R1 is coupled to the emitter of said transistor Q.
3 more elements
A current source comprising:
- two resistors R1 and R3 connected in series;
- first means for applying a voltage across said resistors R1 and R3 to generate a current I, wherein said first means includes a transistor Q, and;
- a digital to analog converter (DAC) adapted to apply a voltage or current at the node between said resistors R1 and R3 to change the current I in response to a control signal input to said DAC;
- and
- second means for supplying said control signal,
- wherein said resistor R3 is connected ground.
3 more elements
A current source comprising:
- a transistor Q adapted to receive a voltage VREF at its base and output a current I at its collector;
- a resistor R1 connected to the emitter of transistor Q;
- a resistor R3 having one end connected in series to R1 and the other end connected to ground;
- a digital to analog converter (DAC) adapted to apply a voltage or current at the node between said resistors R1 and R3 to change the current I in response to a control signal input to said DAC;
- and
- a circuit for supplying said control signal.
3 more elements
A digital to analog converter comprising:
- a first current summing bus;
- a second current summing bus;
- and
- a plurality of current steering cells, each cell including:
- a current source comprising:
- a transistor Q adapted to receive a voltage VREF at its base and output a current I at its collector;
- a resistor R1 connected to the emitter of transistor Q;
- a resistor R3 having one end connected in series to R1 and the other end connected to ground;
- a digital to analog converter (DAC) adapted to apply a voltage or current at the node between said resistors R1 and R3 to change the current I in response to a control signal input to said DAC;
- and
- a circuit for supplying said control signal;
- and
- a pair of transistors for selectively switching current from said current source between said first current summing bus and said second current summing bus in response to an input signal.
10 more elements
Dependencies are inferred from the claim text.