Hybrid tuning circuit for continuous-time sigma-delta analog-to-digital converter
AssigneeAnalog Devices, Inc.
InventorsKhiem Nguyen, Robert W. Adams
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Abstract
A hybrid tuning circuit is used consisting of a digital finite state machine and an analog tuning circuit to effectively keep the RC product of the continuous time integrator constant across process, temperature, supply, and sampling rate variations. Since the implementation is continuous, the tracking is more accurate than traditional techniques. Using a carefully chosen clocking scheme, the technique gets rid of inter-symbol interference in the feedback DAC. The technique does not use a reference frequency, thereby eliminating the need for a user to identify a reference frequency.
Claims24
A hybrid tuning circuit working in conjunction with a modified continuous-time integrator, said modified continuous-time integrator comprising a first plurality of switches and a first programmable capacitor array, said hybrid tuning circuit comprising:
- an analog control circuit comprising a second programmable capacitor array and a second plurality of switches to generate and continuously adjust an integration control signal via controlling said first plurality of switches;
- said integration control signal controlling integration time of said continuous-time integrator;
- and
- a finite state machine monitoring said integration control signal, wherein said finite state machine decrements and increments capacitor size in capacitor arrays of said continuous-time integrator and said analog control circuit.
An integrated circuit implementing a hybrid tuning circuit working in conjunction with a modified continuous-time integrator component, said modified continuous-time integrator comprising a first plurality of switches and a first programmable capacitor array, said integrated circuit comprising:
- an analog control circuit component comprising a second programmable capacitor array and a second plurality of switches to generate and continuously adjust an integration control signal via controlling said first plurality of switches;
- said integration control signal controlling integration time of said continuous-time integrator;
- and
- a finite state machine component monitoring said integration control signal, wherein said finite state machine decrements and increments capacitor size in capacitor arrays of said continuous-time integrator and said analog control circuit.
A modified continuous-time integrator comprising:
- a digital-to-analog converter (DAC);
- a plurality of input resistors;
- an operational amplifier;
- a plurality of switches controllable via a hybrid tuning circuit;
- a plurality of programmable capacitor arrays;
- a fixed capacitor;
- and
- wherein said switches either connect said input resistors and DAC outputs to respective summing junctions of said operational amplifier during an integration period, or said switches disconnect said resistors and DAC outputs from said operational amplifier, and connect said input resistors and DAC outputs to a known voltage.
A finite state machine implemented in a tuning circuit along with an analog tuning block, said tuning circuit working in conjunction with a modified continuous-time integrator, said modified continuous-time integrator comprising a first plurality of switches and a first programmable capacitor array, said finite state machine comprising:
- means for monitoring an integration control signal from said analog tuning block, and
- means for decrementing and incrementing capacitor size of said first programmable capacitor array in said continuous-time integrator based on said monitoring of said integration control signal.
A method of adjusting the integration period in a continuous-time integrator, said method comprising the steps of:
- generating an integration control signal;
- turning ON and OFF the difference between the feed-in and feedback currents of said continuous-time integrator;
- and
- controlling the integration period of said continuous-time integrator by said integration control signal, wherein
- said method further comprises the following steps to reduce inter-symbol interference of a feedback DAC:
- turning OFF said integration control signal;
- changing a DAC code during OFF phase;
- and
- turning ON said integration control signal.
A method of adjusting the integration period in a continuous-time integrator, said method comprising the steps of:
- generating an integration control signal;
- separately turning ON and OFF the feed-in and feedback currents of said continuous-time integrator;
- and
- controlling the integration period of said continuous-time integrator by said integration control signal, wherein
- said method further comprises the following steps to reduce inter-symbol interference of a feedback DAC:
- turning OFF said integration control signal;
- changing a DAC code during OFF phase;
- and
- turning ON said integration control signal.
Dependencies are inferred from the claim text.