Yank detection circuit for self-biased phase locked loops
AssigneeIntel Corporation
InventorsErnest Knoll, Eyal Fayneh
Life of this patent
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AssigneeIntel Corporation
InventorsErnest Knoll, Eyal Fayneh
Estimating the term…
An apparatus for controlling a phase-locked loop includes a detector for detecting at least one of a startup condition and a yank condition and a controller for controlling current between a charge pump and the phase-locked loop. If a startup condition is detected, the controller sinks current from a control node connected to a loop filter of the phase-locked loop. This, in turn, causes a bias voltage to increase until the phase-locked loop transitions from startup mode to a normal acquisition mode. The current sink is provided by a dummy charge pump and the startup condition is determined by detecting the end of a PLL disable state. If a yank condition is detected, a charge pump connected to a phase-frequency detector of the phase-locked loop controls the bias voltage until a feedback frequency becomes lower than a reference frequency. Methods for controlling a phase-locked loop during both modes of operation may use of the aforementioned apparatus.
An apparatus for controlling a phase-locked loop, comprising:
A method for controlling a phase-locked loop, comprising:
A processing system, comprising:
Dependencies are inferred from the claim text.