Method and apparatus to achieve a process, temperature and divider modulus independent PLL loop bandwidth and damping factor using open-loop calibration techniques

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the calibration adjustment circuitry provides corrective action for both a phase locked loop bandwidth and phase locked loop damping factor.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the known calibration signal is provided as at phase detector input.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the known signal calibration signal is provided at a charge pump input.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the calibration adjustment circuitry adjusts the charge pump output during closed loop conditions.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the calibration adjustment circuitry adjusts an element of a loop filter.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• and
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements,
• wherein the known calibration signal is a first known calibration signal, the circuitry further comprising a second known calibration signal, the second known calibration signal coupled to a second switchable circuit element, the second known calibration signal selectively provided to the phase locked loop circuit for open loop measurements.

A phase locked loop circuit, comprising:

• a loop path within the phase locked loop circuit;
• a switchable circuit element connected within the loop path to selectively open the loop path for performing a calibration of the phase locked loop circuit;
• at least one known calibration signal coupled to the switchable circuit element, the known calibration signal selectively provided to the phase locked loop circuit for open loop measurements;
• a frequency measurement circuit coupled to a clock signal generated by the phase locked loop circuit;
• calibration adjustment circuitry coupled to the frequency measurement circuit and at least one portion of the phase locked loop circuit, the calibration adjustment circuitry providing closed loop calibration of the phase locked loop circuit based upon open loop measurements;
• and
• a controllable oscillator providing an output of the phase locked loop and feedback loop divider, the controllable oscillator having a gain that is adjustable in proportion to the feedback divider modulus.