Internal power supply voltage generation circuit that can suppress reduction in internal power supply voltage in neighborhood of lower limit region of external power supply voltage

An internal power supply voltage generation circuit comprising:

• comparator circuitry for providing a signal according to a difference between an internal power supply voltage on an internal power supply line and a reference voltage;
• a current drive element coupled between an external voltage source supplying an externally applied power supply voltage and said internal power supply line, and responsive to an output signal of said comparator circuitry for causing a current flow between said external voltage source and said internal power supply line;
• level adjust circuitry for providing a signal according to a difference between said external power supply voltage and said reference voltage;
• and
• an auxiliary drive element coupled in parallel to said current drive element between said external voltage source and said internal power supply line, for causing a current flow between said external voltage source and said internal power supply line in accordance with the signal output from said level adjust circuitry;
• said level adjust circuitry comprising:
• a comparator stage including (i) a first insulation gate field effect transistor receiving said external power supply voltage at a gate thereof, and (ii) a second insulated gate field effect transistor having a current supply ability greater than a current supply ability of said first insulated gate field effect transistor under a condition of the same gate voltage and receiving said reference voltage at a gate thereof, for comparing said external power supply voltage and said reference voltage, and
• a current mirror type current supply stage for supplying a current to said comparator stage.