Programmable multi-chip module
AssigneeXilinx, Inc.
InventorSteven P. Young
Life of this patent
Estimating the term…
Abstract
A multi-chip module comprising: a first IC having a first column of tiles, where each tile includes programmable logic; a second IC having a second column of tiles, where the second column is aligned with the first column; and a carrier die having signal lines, where a tile in the first column is directly connected to a tile in the second column via one of the signal lines.
Claims31
A multi-chip device comprising:
- a group of aligned regions, each region having a programmable interconnection;
- a first integrated Circuit (IC) having a first region of the group of aligned regions;
- a second IC having a second region of the group of aligned regions;
- and
- a supporting structure having one or more signal lines, wherein the first region is directly connected to the second region via one of the signal lines, wherein a circuit in the first region is connected to a circuit in the second region without use of any Input/Output (I/O) bank on the first IC;
- and
- wherein the first region includes a line driver and a pad, the pad configured to connect the first region to the second region.
A multi-chip module having:
- a first die having a first column of a first plurality of tiles, wherein each tile of the first plurality includes programmable logic;
- a second die having a second column of a second plurality of tiles, wherein the second column is aligned with the first column;
- and
- a supporting substrate having a plurality of signal lines, wherein a tile in the first column is directly connected to a tile in the second column via one of the plurality of signal lines and without using any Input/Output (I/O) bank on the first die;
- and
- wherein the tile in the first column further comprises a line driver and a pad, the pad configured to connect the tile in the first column to the tile in the second column.
A method for creating a multi-chip module (MCM) having a plurality of integrated circuits (ICs), each IC of the plurality of ICs having programmable logic arranged in columns, the method comprising:
- positioning a first IC of the plurality of IC's in the MCM, the first IC having a first column of regions, wherein each region has a logic block;
- positioning a second IC of the plurality of IC's in the MCM, the second IC having a second column of regions, wherein the second column is aligned with respect to the first column;
- and
- configuring a signal wire to directly connect a first region in the first column to a second region in the second column;
- and
- configuring another signal wire to directly connect a third region in the first column to a fourth region in the second column, wherein the third region is adjacent to the first region, and the fourth region is adjacent to the second region;
- and
- wherein a logic block in the first region is connected to a logic block in the second region via a line driver.
A multi-chip module, having programmable interconnections, comprising;
- means for arranging a first plurality of substantially identical connected regions on a first integrated circuit (IC);
- means for arranging a second plurality of substantially identical connected regions on a second IC;
- and
- means for connecting a first region in the first plurality to a second region in the second plurality via a driver circuit;
- and
- wherein a first region of the first plurality has means for directly connecting to a second non-adjacent region of the first plurality.
A system having a plurality of dice, comprising:
- a first die of the plurality of dice comprising a first plurality of columns, each column of the first plurality of columns having a first plurality of substantially identical elements;
- a second die of the plurality of dice comprising a second plurality of columns, each column of the second plurality of columns having a second plurality of substantially identical elements;
- and
- a plurality of signal lines connecting via a plurality of drivers not part of an I/O block, each element of the first plurality of substantially identical elements of each column of the first plurality of columns with an associated element of the second plurality of substantially identical elements of an associated column of the second plurality of columns.
A system having a plurality of dice, the system comprising:
- a first die of the plurality of dice, comprising all input/output blocks on the first die for communicating with circuits located outside of the first die, and a first function block connected to a first interconnect line;
- a second die of the plurality of dice, comprising second input/output blocks for communicating with circuits located outside of the second die, and a second function block connected to a second interconnect line;
- and
- a signal line connecting the first interconnect line to the second interconnect line via a driver, wherein a signal propagates from the first interconnect line to the second interconnect line without propagating through any of the input/output blocks of the first die.
A multi-chip module having a plurality of dice, the system comprising
- a first die of the plurality of dice comprising a first programmable interconnection point connected to a second programmable interconnection point via a first interconnect wire;
- a driver connected to the first interconnect wire, the driver not part of an input/output block of the first die;
- a second die of the plurality of dice comprising a third programmable interconnection point connected to a fourth programmable interconnection point via a second interconnect wire;
- a wire on a third die of the plurality of dice connecting the driver to the second interconnect wire.
Dependencies are inferred from the claim text.