Circuit substrates, semiconductor packages, and ball grid arrays

A semiconductor package comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, at least one of the opposing side having conductive traces formed thereon;
• a soldermask received on the one side, the soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one side;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of an outermost extent of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A semiconductor package comprising:

• a semiconductor chip:
• a circuit substrate having opposing sides, at least one of the opposing sides having conductive traces formed thereon;
• a soldermask received on the one side, the soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one side;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench, the peripheral elongated trench being continuous about a periphery.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;
• a soldermask received on each of the opposing sides, the respective soldermasks having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of an outermmost extent the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;
• a soldermask received on each of the opposing sides, the respective soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted, the peripheral elongated trench being continuous about a peripher;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A semiconductor package comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, at least one of the opposing sides having conductive traces formed thereon;
• a soldermask received on the one side, the soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one side;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench, the peripheral elongated trench being discontinuous about a peirphery, the trench and periphery defining at least four straight linear segments, adjacent of said at least four straight linear segments being angled relative to one another along the one side of the substrate.

A semiconductor package comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, at least one of the opposing sides having conductive traces formed thereon;
• a soldermask received on the one side, the soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one side;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulative having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench, the peripheral elongated trench being discontinuous about a periphery, the trench and periphery defining at least eight straight linear segments, adjacent of said at least eight straight linear segments being angled relative to one another along the one side of the substrate.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;
• a soldermask received on each of the opposing sides, the respective soldermasks having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted, the peripheral elongated trench being continuous about a periphery, the trench and periphery defining at least four straight linear segments, adjacent of said at least four straight linear segments being angled relative to one another along the one side of the substrate;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides having respective conductive traces formed thereon.
• a soldermask received on each of the opposing sides, the respective soldermasks having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposite sides;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted, the peripheral elongated trench being continuous about a periphery, the trench and periphery defining at least eight linear segments, adjacent of said at least eight straight linear segments being angled relative to one another along the one side of the substrate;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;
• a soldermask received on each of the opposing sides, the respective soldermasks having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides;
• an peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted, the peripheral elongated trench being discontinuous about a periphery, the trench and periphery defining at least four straight linear segments, adjacent of said at least four straight linear segments being angled relative to one another along the one side of the substrate;
• and
• an insulative encapsulant being received about the semiconductor chip on the one side,the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.

A ball grid array comprising:

• a semiconductor chip;
• a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;
• a soldermask received on each of the opposing sides, the respective soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip bein mounted to one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides;
• an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted, the peripheral elongated trench is discontinuous about a periphery, the trench and periphery defining at least eight straight linear segments, adjacent of said at least eight straight linear segments being angled relative to one another along the one side of the substrate;
• and an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter edge, at least a portion of the encapsulant outer perimeter edge being received within the outer peripheral soldermask trench.