Semiconductor device, semiconductor package member, and semiconductor device manufacturing method
AssigneeKabushiki Kaisha Toshiba
InventorsMitsuyoshi Endo, Mie Matsuo, Chiaki Takubo
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AssigneeKabushiki Kaisha Toshiba
InventorsMitsuyoshi Endo, Mie Matsuo, Chiaki Takubo
Estimating the term…
Provided a semiconductor device including: a wiring board; a semiconductor chip having a pad electrically connected to a wiring on the wiring board; a second semiconductor chip provided on the wiring board at a position facing a side of the semiconductor chip, having passive elements integrated therein, and having pads for external connection to which both ends of the passive elements are connected respectively and at least one of which is electrically connected to the wiring on the wiring board electrically connected to the pad of the semiconductor chip.
A semiconductor device, comprising:
A semiconductor device, comprising:
A semiconductor package member, comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Electrical arrangements for controlling or matching impedance: at high-frequency [HF] or radio frequency [RF]
Interconnections or connectors in packages
Characterised by their interconnections: vias, e.g. via plugs
Connecting or disconnecting: of bump connectors
Term ended 8 Dec 2023 (estimated)
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-272589 filed on Sep. 19, 2002; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device including semiconductor chips and members that draw out electrical leads from the semiconductor chips, a semiconductor package member used for such a semiconductor device, and a manufacturing method of such a semiconductor device, and more particularly, to the semiconductor device, the semiconductor package member, and the semiconductor device manufacturing method that are suitable for a high-frequency (high-speed) circuit.
The present invention will be described with reference to the drawings. These drawings are provided only for the illustrative purpose and in no respect, are intended to limit the present invention.
FIG. 1A and FIG. 1B are views showing a manufacturing process of a semiconductor device according to an embodiment of the present invention.
FIG. 2A and FIG. 2B are views subsequent to FIG. 1A and FIG. 1B, showing a manufacturing process of the semiconductor device according to the embodiment of the present invention.
In a semiconductor device according to an aspect of the present invention, passive elements are integrated in a second semiconductor chip, and both ends of the passive elements are connected to pads for external connection respectively. A semiconductor chip and the second semiconductor chip are common in that they are semiconductor chips and the arrangement pitches of pads (pads for external connection) provided thereon can be at least substantially the same order.
Therefore, it is possible to dispose the second semiconductor chip adjacent to a position facing a side of the semiconductor chip. As a result, the passive elements integrated in the second semiconductor chip are positioned very close to the semiconductor chip, which makes it possible to eliminate a factor obstructing a high-frequency operation. Here, examples usable as a wiring board are a resin substrate such as glass epoxy resin and a ceramic substrate such as alumina.
As a form of an embodiment, the passive elements integrated in the second semiconductor chip are elements of one kind, or two kinds or more selected from a group of capacitors, resistors, and inductors. They can be utilized as, for example, bypass capacitors in the case of capacitors, antireflective elements in the case of resistors, and load elements of a VCO in the case of inductors. These passive elements can be connected in parallel between pads of the semiconductor chip or connected in series from the pads of the semiconductor chip.