Semiconductor device and method of making the same
AssigneeRohm Co., Ltd.
InventorYasumasa Kasuya
Life of this patent
Estimating the term…
Abstract
A semiconductor device and a method of making a semiconductor device are provided, wherein the device includes a die-pad, a semiconductor chip and a sealing resin. The die-pad has a first surface and a second surface opposite to the first surface. The second surface includes an exposed portion and a retreated portion around the exposed portion. The semiconductor chip is mounted on the first surface of the die-pad. The sealing resin covers the die-pad and the semiconductor chip, exposes the exposed portion, and is held in contact with the retreated portion.
Claims10
A semiconductor device comprising:
- a die-pad including a first surface, a second surface opposite to the first surface, and a peripheral edge, the second surface including an exposed portion and a retreated portion around the exposed portion;
- a semiconductor chip mounted on the first surface of the die-pad;
- and
- a sealing resin covering the die-pad and the semiconductor chip, the resin allowing the exposed portion to be exposed and being held in contact with the retreated portion,
- wherein the die-pad is formed with at least one slit that is open in the retreated portion of the second surface and in the first surface,
- the at least one slit is located between the peripheral edge of the die-pad and the semiconductor chip,
- the semiconductor chip has a side facing the at least one slit and extending from a first corner of the chip to a second corner of the chip, and
- the at least one slit is formed along the side of the chip and extends continuously from a first position that is closer to the first corner of the chip than to the second corner of the chip to a second position that is closer to the second corner of the chip than to the first corner of the chip.
A semiconductor device comprising:
- a semiconductor chip;
- a die-pad including an upper surface on which the semiconductor chip is mounted and a lower surface opposite to the first surface, the die-pad being electrically connected to the semiconductor chip via a first wire;
- a plurality of leads spaced from the die-pad via a clearance and electrically connected to the semiconductor chip via second wires;
- and
- a sealing resin enclosing the semiconductor chip in a manner such that the lower surface of the die-pad is exposed;
- wherein the die-pad includes a thin-walled portion formed by removing a part of the lower surface along a peripheral edge of the die-pad, the die-pad being formed with at least one slit extending through the thin-walled portion,
- the at least one slit is located inwardly from the clearance and between the peripheral edge of the die-pad and the semiconductor chip,
- the semiconductor chip has a side facing the at least one slit and extends from a first corner of the chip to a second corner of the chip, and
- the at least one slit is formed along the side of the chip and extends continuously from a first position that is closer to the first corner of the chip than to the second corner of the chip.
A semiconductor device comprising:
- a die-pad including a first surface, a second surface opposite to the first surface, and a peripheral edge, the second surface including an exposed portion and a retreated portion around the exposed portion;
- a semiconductor chip mounted on the first surface of the die-pad, the chip having a first side and a second side adjoining the first side to define a corner between the first and second sides;
- and
- a sealing resin covering the die-pad and the semiconductor chip, the resin allowing the exposed portion to be exposed and being held in contact with the retreated portion,
- wherein the die-pad is formed with first and second slits each of which is open in the retreated surface of the second surface and in the first surface,
- the slits are being located between the peripheral edge of the die-pad and the semiconductor chip,
- the first slit facing and extending along the first side of the semiconductor chip, the second slit facing and extending along the second side of the semiconductor chip, and
- wherein the first and second slits are discontinuous with each other at the corner of the chip.
Dependencies are inferred from the claim text.