Electrically-alterable non-volatile memory cell
AssigneeVirage Logic Corporation
InventorsKim-Kwong Michael Han, Narbeh Derhacobian, Jaroslav Raszka
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Abstract
A method, apparatus, and system in which an embedded memory comprises one or more electrically-alterable non-volatile memory cells that include a coupling capacitor, a read transistor, and a tunneling capacitor. The coupling capacitor has a first gate composed of both N+ doped material and P+ doped material, and a P+ doped region abutted to a N+ doped region. The P+ doped region abutted to the N+ doped region surrounds the first gate. The read transistor has a second gate. The tunneling capacitor has a third gate composed of both N+ doped material and P+ doped material.
Claims20
An electrically-alterable non-volatile memory cell, comprising:
- a floating gate, wherein at least 70 percent of the floating gate is N+ doped and one or more partitioned areas of the floating gate are doped P+;
- an insulating material having a first side and a second side, the floating gate deposited onto the insulating material;
- and
- a P+ doped region abutted to a N+ doped region, the floating gate surrounded by the P+ doped region abutted to the N+ doped region, the P+ doped region connecting to the first side of the insulating material and the N+ doped region connecting to the second side of the insulating material.
An embedded memory, comprising:
- one or more electrically-alterable non-volatile memory cells, an electrically-alterable non-volatile memory cell including:
- a sense mode component to communicate information stored in the electrically-alterable non-volatile memory cell during a read operation;
- a charge mode component to facilitate programming and erasing of information stored in the electrically-alterable non-volatile memory cell, the charge mode component including a coupling capacitor in a first well and a tunneling capacitor in a second well;
- and
- a floating gate having at least seventy percent of the floating gate N+ doped and one or more partitioned areas of the floating gate are P+ doped.
A memory, comprising:
- one or more electrically-alterable non-volatile memory cells, an electrically-alterable non-volatile memory cell including:
- a sense mode component to communicate information stored in the electrically-alterable non-volatile memory cell during a read operation;
- a charge mode component to operate as a capacitive divider to facilitate programming and erasing of information stored in the electrically-alterable non-volatile memory cell by symmetrical movement of charge;
- and
- a floating gate having at least seventy percent of the floating gate N+ doped and one or more partitioned areas of the floating gate are P+ doped.
A machine readable medium that stores data representing a memory that includes:
- one or more electrically-alterable non-volatile memory cells, an electrically-alterable non-volatile memory cell includes
- a sense mode component to communicate information stored in the electrically-alterable non-volatile memory cell during a read operation;
- a charge mode component to facilitate programming and erasing of information
- stored in the electrically-alterable non-volatile memory cell, the charge mode component including a coupling capacitor in a first well and a tunneling capacitor in a second well;
- and
- a floating gate having at least seventy percent of the floating gate N+ doped and one or more partitioned areas of the floating gate are P+ doped.
A machine readable medium that stores data representing an electrically-alterable non-volatile memory cell that includes:
- a floating gate, wherein at least 70 percent of the floating gate is N+ doped and one or more partitioned areas of the floating gate are doped P+;
- an insulating material having a first side and a second side, the floating gate deposited onto the insulating material;
- and
- a P+ doped region abutted to a N+ doped region, the floating gate surrounded by the P+ doped region abutted to the N+ doped region, the P+ doped region connects to the first side and the N+ doped region connects to the second side.
Dependencies are inferred from the claim text.