Structure and method of liner air gap formation
AssigneeChartered Semiconductor Manufacturing Ltd.
InventorsXiaomei Bu, Alex See, Tae Jong Lee, Fan Zhang, Yeon Kheng Lim, Liang Choo Hsia
Life of this patent
Estimating the term…
Abstract
A structure and method of a semiconductor device with liner air gaps next to interconnects and dielectric layers. A dielectric layer is formed over a lower dielectric layer and a lower interconnect over a substrate. We form an interconnect opening in the dielectric layer. The opening has sidewalls of the dielectric layer. A sacrificial liner is formed over the sidewalls of the interconnect opening. An upper interconnect is formed that fills the opening. We remove the sacrificial liner/spacers to form (air) liner gaps.
Claims29
A method of fabrication of liner gap in a semiconductor device;
- comprising the steps of:
- a) forming a dielectric layer over a substrate;
- then
- b) forming an opening in said dielectric layer;
- said opening has sidewalls of said dielectric layer;
- then
- c) forming a sacrificial liner over the sidewalls of said opening;
- then
- d) forming an upper interconnect filling said opening;
- and then
- e) removing said sacrificial liner to form air liner gaps.
A method of fabrication of liner gap in a semiconductor device;
- comprising the steps of:
- a) forming a first IMD layer over a structure;
- then
- b) forming a trench through said first IMD layer to expose the top surface of said structure;
- said trench having sidewalls on said first IMD layer;
- then
- c) forming a first sacrificial liner over at least the sidewalls of said wench;
- then
- d) forming a first interconnect filling said trench;
- then
- e) forming a first IMD cap layer over said first interconnect;
- then
- f) forming a second IMD dielectric layer over said first IMD cap layer and first IMD layer;
- then
- g) forming an opening in said second IMD dielectric layer to expose said first IMD cap layer;
- then
- h) forming a sacrificial liner over the sidewalls of said opening;
- then
- i) forming a second interconnect filling said opening;
- then
- j) forming a second IMD cap layer over said second interconnect and said second IMD layer;
- k) forming a third IMD layer over said second IMD cap layer;
- l) removing said sacrificial liner to form air liner gaps.
A method of fabrication of liner gap in a semiconductor device;
- comprising the steps of:
- a) forming a first IMD layer over a structure:
- then
- b) forming a trench through said first IMD layer to expose the surface of said structure;
- said
- trench having sidewalls on said first IMD layer;
- then
- c) forming a insacrificial liner over at least the sidewalls of said trench;
- then
- d) forming a first interconnect filling said trench;
- then
- e) forming a first IMD cap layer over said first level interconnect;
- then
- f) forming a second IMD layer over said first IMD cap layer and first IMD layer;
- then
- g) forming an opening in said second IMD dielectric layer to expose said first IMD cap layer;
- then
- h) forming a sacrificial liner over the sidewalls of said opening;
- then
- i) forming a second level interconnect filling said opening;
- 1) said second level interconnect comprised of a metal liner and a metal second level interconnect;
- then
- j) forming a second IMD cap layer over said second level interconnect and said second IMD layer;
- then
- k) forming a third IMD layer over said second IMD cap layer;
- then
- l) removing sacrificial liner to form air liner gaps;
- and
- removing said first sacrificial liner spaced to form air trench liner gaps.
Dependencies are inferred from the claim text.