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US 7,094,663 B2Granted
Semiconductor device and method of manufacturing the same
AssigneeKabushiki Kaisha Toshiba
InventorEiji Morifuji
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Abstract
The semiconductor device has a low-resistance layer provided under the interconnection extending from the signal input to a gate of MOSFET. The low-resistance layer decreases the substrate resistance and the noise characteristic of the semiconductor device can also be improved. The low-resistance layer can be provided on a surface of the substrate or a polysilicon interconnection.
Claims3
A method for manufacturing a semiconductor device comprising:
- forming a device isolation layer for defining a device region and a high concentration impurity diffused region acting as a substrate/well potential take-out region;
- forming a gate electrode on a surface of the substrate within the device region;
- implanting ions in the device region and the high concentration impurity diffused region with the device isolation layers and the gate electrode being as implantation mask;
- depositing low resistance layer at least on the upper surface of the high concentration impurity diffused region, this low resistance layer acting as a shield during operation;
- depositing an inter-layer insulating film;
- and
- forming a first interconnection connected to the gate electrode and a second interconnection connected to the high concentration impurity diffused region on the said inter-layer insulating film, at least the first interconnection being disposed so that it runs above the high concentration impurity diffused region.
4 more elements
Dependencies are inferred from the claim text.