Load board
AssigneeSilicon Integrated Systems Corp.
InventorsChing-Jung Huang, Hsiu-Chu Chou, Mu-Sheng Liao, Fu-Tsai Chen, Pao-Chuan Kuo
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Abstract
A load board for packaged IC testing. The load board with predetermined testing circuit thereon has bonding pad areas on its surface. A plurality of bonding pads is formed on the bonding pad areas, each of which is disposed corresponding to a lead of a packaged IC for testing connection, such as a quad flat packaged IC (QFP), a dual inline packaged IC (DIP) or a small outline packaged IC (SOP). The bonding pads on the load board connect the leads of the testing IC directly during IC testing, thus the conventional test socket between a conventional load board and a packaged IC is omitted.
Claims4
A load board, comprising a testing circuit therein and a plurality of bonding pad areas on the surface thereof, wherein a plurality of bonding pads is disposed on the bonding pad areas, each of which is disposed corresponding to a lead of an IC for directly bonding thereto and composed of a copper layer, a nickel layer and a gold layer, where the gold layer has a sufficient thickness of around 90 μm to 120 μm to be directly bonded to the leads of the IC.
Dependencies are inferred from the claim text.