Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
AssigneeAcorn Technologies, Inc.
InventorsDaniel E. Grupp, Daniel J. Connelly
Life of this patent
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AssigneeAcorn Technologies, Inc.
InventorsDaniel E. Grupp, Daniel J. Connelly
Estimating the term…
An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. The interface layer may include a layer of a passivating material (e.g., made from nitrogen, oxygen, oxynitride, arsenic, hydrogen and/or fluorine) and sometimes also includes a separation layer. In some cases, the interface layer may be a monolayer of a semiconductor passivating material. The interface layer thickness corresponds to a minimum specific contact resistance of less than or equal to 10 Ω-μm2 or even less than or equal to 1 Ω-μm2 for the electrical device.
An electrical device, comprising:
An electrical device, comprising a metal—interface layer—Si-based semiconductor junction in which the interface layer is less than 1 nm thick in a vicinity of the junction and includes a passivating material and the electrical device has a specific contact resistance of less than approximately 1000 Ω-μm2.
A method, comprising depinning a Fermi level of a conductor in an electrical junction with a silicon-based semiconductor through the use of an interface layer disposed between a surface of the semiconductor and the conductor, wherein the interface layer (i) has a thickness of less than 1 nm in a vicinity of the junction yet sufficient to reduce effects of metal-induced gap states in the semiconductor while providing the junction with a specific contact resistance of less than approximately 1000 Ω-μm2, and (ii) passivates the surface of the semiconductor.
An electrical device, comprising a junction between a Si-based semiconductor and a conductor separated from the semiconductor by an interface layer having a thickness of less than 1 nm in a vicinity of the junction yet that allows a Fermi level of the conductor to align with a conduction band of the semiconductor, wherein the electrical device has a specific contact resistance less than approximately 1000 Ω-μm2.
An electrical device, comprising a junction between a Si-based semiconductor and a conductor separated from the semiconductor by an interface layer having a thickness of less than 1 nm in a vicinity of the junction yet that allows a Fermi level of the conductor to align with a valence band of the semiconductor, wherein the electrical device has a specific contact resistance less than approximately 1000 Ω-μm2.
An electrical device, comprising a junction between a Si-based semiconductor and a conductor separated from the semiconductor by an interface layer having a thickness of less than 1 nm in a vicinity of the junction yet that allows a Fermi level of the semiconductor to be independent of a Fermi level of the conductor, wherein the electrical device has a specific contact resistance less than approximately 1000 Ω-μm2.
An electrical device, comprising:
An electrical device, comprising:
An electrical device, comprising a junction between a Si-based semiconductor and a conductor separated from the semiconductor by an interface layer having a thickness sufficient to depin a Fermi level of the conductor in a vicinity of the junction yet thin enough to provide the junction with a specific contact resistance that is generally dependent on the workfunction of the conductor.
Dependencies are inferred from the claim text.