# US 7,080,179 B1 · Multi-level interrupts

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- Number: US 7,080,179 B1
- Document ID: US7080179B1
- Status: Granted
- Kind: B1
- Application number: 10/810,057
- Filed: 2004-03-26
- Granted: 2006-07-18
- Earliest claimed: 2004-03-26
- Assignees: Foundry Networks, Inc.
- Inventors: Changbai He; Ron Talmor
- Web page: https://patentgrep.com/patent/US7080179B1

## CPC

- G06F 13/24: using interrupt (G06F13/32 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Multiple levels of interrupts to be utilized in a computer system, which allows, for example, an interrupt with an interrupt level associated with an application to be distinct from an interrupt with an interrupt level associated with a kernel. The kernel level interrupt may be handled quickly via its own handler, while the application level interrupt may be handled more slowly. This may be accomplished by first determining if a first-level handler is installed for the interrupt source. If so, then it may be called. Otherwise, the interrupt source may be masked and a second-level handler may be called. Once this second-level handler has completed its tasks, the interrupt source may then be unmasked. Implementations with three or more levels of interrupt are also possible.

## Claims

### Claim 1

A method for handling an interrupt in a computer system, the interrupt having a source, the method comprising:
determining if a first-level handler is installed for the interrupt source;
calling said first-level handler if one is installed for the interrupt source;
masking the interrupt source if a first-level handler is not installed for the interrupt source;
calling a second-level handler if a first-level handler is not installed for the interrupt source; and
unmasking the interrupt source if a first-level handler is not installed for the interrupt source.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
retrieving the interrupt source.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
determining if the interrupt source is active; and
returning from the method if the interrupt source is not active.

### Claim 4 (depends on 1)

The method of claim 1, further comprising:
setting an interrupt pending flag for the interrupt source before said calling a second-level handler if a first level-handler is not installed for the interrupt source.

### Claim 5 (depends on 4)

The method of claim 4, wherein said calling a second-level handler includes:
clearing the pending interrupt flag for the interrupt source.

### Claim 6 (depends on 1)

The method of claim 1, wherein said first-level handler is a kernel-level handler.

### Claim 7 (depends on 1)

The method of claim 1, wherein said second-level handler is a user-level handler.

### Claim 8

A method for handling an interrupt in a computer system, the interrupt having a source, the method comprising:
determining if a first-level handler is installed for the interrupt source;
calling said first-level handler if one is installed for the interrupt source;
masking the interrupt source if a first-level handler is not installed for the interrupt source;
determining if a second-level handler is installed for the interrupt source if a first-level handler is not installed for the interrupt source;
calling said second-level handler if a first-level handler is not installed for the interrupt source and a second-level handler is installed for the interrupt source; and
unmasking the interrupt source if a first-level handler is not installed for the interrupt source.

### Claim 9 (depends on 8)

The method of claim 8, further comprising:
determining if a third-level handler is installed for the interrupt source if a first-level handler is not installed for the interrupt source and a second-level handler is not installed for the interrupt source; and
calling said third-level handler if a first-level handler is not installed for the interrupt source, a second-level handler is not installed for the interrupt source, and a third-level handler is installed for the interrupt source.

### Claim 10 (depends on 8)

The method of claim 8, further comprising:
retrieving the interrupt source.

### Claim 11 (depends on 8)

The method of claim 8, further comprising:
determining if the interrupt source is active; and
returning from the method if the interrupt source is not active.

### Claim 12 (depends on 8)

The method of claim 8, further comprising:
setting an interrupt pending flag for the interrupt source before said calling said second-level handler.

### Claim 13 (depends on 12)

The method of claim 12, wherein said calling a second-level handler includes:
clearing the pending interrupt flag for the interrupt source.

### Claim 14

An apparatus for handling an interrupt in a computer system, the interrupt having a source, the apparatus comprising:
an installed first-level handler determiner;
a first-level handler caller coupled to said installed first-level handler determiner;
an interrupt source masker coupled to said installed-first level handler determiner;
an installed second-level handler determiner coupled to said interrupt source masker;
a second-level handler caller coupled to said installed second-level handler determiner; and
an interrupt source unmasker coupled to said second-level handler caller.

### Claim 15 (depends on 14)

The apparatus of claim 14, further comprising:
an installed third-level handler determiner coupled to said installed second-level handler determiner; and
a third-level handler caller coupled to said installed third-level handler determiner and to said interrupt source unmasker.

### Claim 16 (depends on 14)

The apparatus of claim 14, further comprising:
an interrupt source retriever coupled to said installed first-level handler determiner.

### Claim 17 (depends on 14)

The apparatus of claim 14, further comprising:
an interrupt source active determiner coupled to said installed first-level handler determiner; and
a method returner coupled to said interrupt source active determiner.

### Claim 18 (depends on 14)

The apparatus of claim 14, further comprising:
an interrupt pending flag setter coupled to said interrupt source masker.

### Claim 19 (depends on 18)

The apparatus of claim 18, wherein said second-level handler caller includes a pending interrupt flag clearer.

### Claim 20

An apparatus for handling an interrupt in a computer system, the interrupt having a source, the apparatus comprising:
means for determining if a first-level handler is installed for the interrupt source;
means for calling said first-level handler if one is installed for the interrupt source;
means for masking the interrupt source if a first-level handler is not installed for the interrupt source;
means for calling a second-level handler if a first-level handler is not installed for the interrupt source; and
means for unmasking the interrupt source if a first-level handler is not installed for the interrupt source.

### Claim 21 (depends on 20)

The apparatus of claim 20, further comprising:
means for retrieving the interrupt source.

### Claim 22 (depends on 20)

The apparatus of claim 20, further comprising:
means for determining if the interrupt source is active; and
means for returning from the method if the interrupt source is not active.

### Claim 23 (depends on 20)

The apparatus of claim 20, further comprising:
means for setting an interrupt pending flag for the interrupt source before said calling a second-level handler if a first level-handler is not installed for the interrupt source.

### Claim 24 (depends on 23)

The apparatus of claim 23, wherein said means for calling a second-level handler includes:
means for clearing the pending interrupt flag for the interrupt source.

### Claim 25 (depends on 20)

The apparatus of claim 20, wherein said first-level handler is a kernel-level handler.

### Claim 26 (depends on 20)

The apparatus of claim 20, wherein said second-level handler is a user-level handler.

### Claim 27

An apparatus for handling an interrupt in a computer system, the interrupt having a source, the apparatus comprising:
means for determining if a first-level handler is installed for the interrupt source;
means for calling said first-level handler if one is installed for the interrupt source;
means for masking the interrupt source if a first-level handler is not installed for the interrupt source;
means for determining if a second-level handler is installed for the interrupt source if a first-level handler is not installed for the interrupt source;
means for calling said second-level handler if a first-level handler is not installed for the interrupt source and a second-level handler is installed for the interrupt source; and
means for unmasking the interrupt source if a first-level handler is not installed for the interrupt source.

### Claim 28 (depends on 27)

The apparatus of claim 27, further comprising:
means for determining if a third-level handler is installed for the interrupt source if a first-level handler is not installed for the interrupt source and a second-level handler is not installed for the interrupt source; and
means for calling said third-level handler if a first-level handler is not installed for the interrupt source, a second-level handler is not installed for the interrupt source, and a third-level handler is installed for the interrupt source.

### Claim 29 (depends on 27)

The apparatus of claim 27, further comprising:
means for retrieving the interrupt source.

### Claim 30 (depends on 27)

The apparatus of claim 27, further comprising:
means for determining if the interrupt source is active; and
means for returning from the method if the interrupt source is not active.

### Claim 31 (depends on 27)

The apparatus of claim 27, further comprising:
means for setting an interrupt pending flag for the interrupt source before said calling said second-level handler.

### Claim 32 (depends on 31)

The apparatus of claim 31, wherein said means for calling a second-level handler includes:
means for clearing the pending interrupt flag for the interrupt source.

### Claim 33

A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform a method for handling an interrupt in a computer system, the interrupt having a source, the method comprising:
determining if a first-level handler is installed for the interrupt source;
calling said first-level handler if one is installed for the interrupt source;
masking the interrupt source if a first-level handler is not installed for the interrupt source;
calling a second-level handler if a first-level handler is not installed for the interrupt source; and
unmasking the interrupt source if a first-level handler is not installed for the interrupt source.

### Claim 34

A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform a method for handling an interrupt in a computer system, the interrupt having a source, the method comprising:
determining if a first-level handler is installed for the interrupt source;
calling said first-level handler if one is installed for the interrupt source;
masking the interrupt source if a first-level handler is not installed for the interrupt source;
determining if a second-level handler is installed for the interrupt source if a first-level handler is not installed for the interrupt source;
calling said second-level handler if a first-level handler is not installed for the interrupt source and a second-level handler is installed for the interrupt source; and
unmasking the interrupt source if a first-level handler is not installed for the interrupt source.
