Method and system for filter tuning using a digital trim value
AssigneeMicrotune (Texas), L.P.
InventorR. William Ezell
Life of this patent
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Abstract
A method for storing a result of a tuning process includes generating a first characteristic signal using a signal generator. The method also includes generating a second characteristic signal using a master circuit, wherein the master circuit generates the second characteristic signal in response to a current signal. The method further includes determining an adjustment to the current signal based at least in part upon the first and second characteristic signals, and storing a digital value representing the adjustment.
Claims29
A method for storing a result of a tuning process, comprising:
- a) generating a first characteristic signal;
- b) generating a second characteristic signal in response to a current signal;
- c) determining an adjustment to the current signal based at least in part upon the first and second characteristic signals;
- d) storing, in a memory, a digital value representing the adjustment;
- e) repeating elements a) through d) iteratively and updating the digital value stored in the memory after each iteration;
- and
- f) stopping the iterative repetition upon performing a predetermined number of iterations.
A tuning circuit, comprising:
- a signal generator operable to generate a first characteristic signal;
- a master circuit operable to receive a current signal and to generate a second characteristic signal in response to the current signal;
- a controller operable to:
- a) determine an adjustment to the current signal based at least in part upon the first and second characteristic signals;
- b) store, in a memory, a digital value representing the adjustment;
- c) repeat elements a) and b) iteratively and update the digital value stored in the memory after each iteration;
- and
- a counter operable to maintain a count of a number of iterations completed by the controller, wherein the controller is further operable to stop the iterative repetition of the steps in response to the count reaching a predetermined number;
- and
- the memory operable to store the digital values.
A circuit, comprising:
- a first comparator operable to:
- compare a first voltage across a first capacitor to a reference voltage;
- and
- generate a signal when the first voltage reaches the reference voltage;
- a second comparator operable to compare a second voltage measured across a second capacitor to a third voltage;
- a counter operable to maintain a count of the number of signals generated by the first comparator;
- a memory operable to store a digital value comprising a plurality of bits;
- and
- a controller operable to receive the signal from the first comparator and, in response, to store the result of the comparison performed by the second comparator in a particular bit of the digital value identified by the count on the counter.
A system, comprising:
- means for generating a first characteristic signal;
- means for generating a second characteristic signal in response to a current signal;
- means for iteratively determining an adjustment to the current signal based at least in part upon the first and second characteristic signals;
- means for storing a digital value representing the adjustment, wherein the means for storing is operable to update the digital value after each iteration;
- means for counting a number of iterations performed by the means for determining the adjustment;
- and
- means for stopping the iteration of the means for determining upon the means for determining performing a predetermined number of iterations.
Dependencies are inferred from the claim text.