Symbol-based signaling device for an electromagnetically-coupled bus system
AssigneeIntel Corporation
InventorsThomas D. Simon, Rajeevan Amirtharajah, Nandu J. Marketkar, Thomas F. Knight, Jr.
Life of this patent
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Abstract
The present invention provides a chipset for transferring data through an electromagnetically coupled bus system. The chipset includes a modulator, a matching circuit and a demodulator. The modulator modifies a clock to encode multiple bits in a complementary pair of symbols. The matching circuit modifies the clock signal to generate a complementary pair of reference signals that is transmitted with the complementary symbol pair, and the demodulator decodes a second set of bits from selected properties of a complementary pair of transferred symbols.
Claims18
An apparatus comprising:
- a modulator to modify a clock signal responsive to a first plurality of bits to generate a complementary pair of symbols, wherein the modulator includes two or more modulators from a group consisting of a phase modulator, a pulse-width modulator, a rise-time modulator, and an amplitude modulator to modify the clock signal;
- a first matching circuit to modify the clock signal to generate a complementary pair of reference signals to be transmitted with the complementary pair of symbols;
- and
- a demodulator coupled to the modulator to decode a second plurality of bits from selected properties of a complementary pair of transferred symbols.
An apparatus to transfer data on a multi-drop bus comprising:
- a signal generator to provide a signal edge in a symbol period;
- a modulator to generate a symbol from the signal edge, responsive to a first plurality of bits;
- and
- a demodulator to recover a second plurality of bits from a transferred symbol provided in response to the generated symbol, wherein the first plurality of bits includes a phase bit and width bits, and the modulator includes a phase modulator to modify a position of the signal edge in the symbol period, responsive to the phase bit, and the modulator includes a pulse-width modulator to generate a second edge at a position in the symbol period indicated by the width bits.
An apparatus comprising:
- a modulator to translate a data request into a sequence of complementary symbol pairs, each symbol pair representing a plurality of bits using two or more modulators from a group consisting of an amplitude modulator, a phase modulator, a rise-time modulator and a pulse-width modulator;
- and
- a receiver coupled to the modulator to recover data from a sequence of transferred complementary symbol pairs.
Dependencies are inferred from the claim text.