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US 7,075,284 B2Granted
Time limit function utilization
AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi Watanabe, Kazuya Matsuzawa, Riichiro Shirota
Life of this patent
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Abstract
A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
Claims11
A semiconductor integrated circuit comprising:
- an aging circuit configured by parallel-connecting a plurality of aging devices in which an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal.
Dependencies are inferred from the claim text.