Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage

A method for fabricating a Fin FET comprising:

• providing a substrate including silicon fins, wherein an upper surface of the silicon fins are protected by a fin capping layer formed thereon;
• filling a part of a trench between the silicon fins with an insulation material to form a device isolation layer;
• forming a sacrificial layer filling the trench and having a predetermined height from an upper portion of the fin capping layer;
• patterning the sacrificial layer and the fin capping layer to form sacrificial dummy gate lines on sidewalls of silicon fins, the fin capping layer and the device isolation layer;
• forming an insulation layer filling spaces between the sacrificial dummy gate lines;
• removing the sacrificial dummy gate lines to form grooves defining gate lines in the insulation layer;
• and
• filling the grooves with a conductive material to form gate lines.

A method for fabricating a Fin FET comprising:

• forming a fin capping layer on a substrate;
• etching the substrate exposed by the fin capping layer to form silicon fins;
• filling a part of a trench between the silicon fins with an insulation layer to form a device isolation layer;
• forming a buffer oxide liner;
• forming a sacrificial layer filling the trench and having a predetermined height from an upper portion of the fin mask;
• forming an etching mask on the sacrificial layer;
• etching the sacrificial layer exposed by the etching mask, the buffer oxide layer and the fin capping layer to form sacrificial dummy gate lines and expose a part of the silicon fins;
• filling a space between the sacrificial dummy gate lines with an insulation layer;
• removing the etching mask and sacrificial dummy gate lines to form grooves defining gate lines;
• removing a part of the buffer oxide liner exposed by the grooves;
• and
• filling the grooves with a conductive material to form gate lines.