Apparatus and methods for interconnect zones and associated cells in integrated circuits

An integrated circuit, comprising:

• a first circuit block within the integrated circuit, the first circuit block manufactured on the integrated circuit according to a first minimum feature size;
• a second circuit block within the integrated circuit, the second circuit block manufactured on the integrated circuit according to a second minimum feature size, wherein the second minimum feature size is different than the first minimum feature size;
• and
• an interconnect zone cell surrounding the first circuit block and being surrounded by the second circuit block configured to connect to a portion of the first circuit block and to connect to a portion of the second circuit block, wherein the interconnect zone cell establishes a physical communication path within the integrated circuit between the first circuit block and the second circuit block.

A layout for an integrated circuit, comprising:

• a first layout zone, including a layout for a first circuit block within the integrated circuit, the first layout zone manufactured on the integrated circuit according to a first minimum feature size;
• a second layout zone, including a layout for a second circuit block within the integrated circuit, the second layout zone manufactured on the integrated circuit according to a second minimum feature size, wherein the second minimum feature size is different than the first minimum feature size;
• and
• an interconnect zone manufactured on the integrated circuit adjacent to the first layout zone and the second layout zone configured to establish a physical communication path within the integrated circuit between the first layout zone and the second layout zone, wherein the interconnect zone surrounds the first layout zone, and wherein the second layout zone surrounds the interconnect zone.

A method of producing a layout for an integrated circuit, comprising:

• generating a first layout zone manufactured on the integrated circuit according to a first minimum feature size, the first layout zone including a layout for a first circuit block within the integrated circuit;
• generating a second layout zone manufactured on the integrated circuit according to a second minimum feature size, the second layout zone including a layout for a second circuit block within the integrated circuit, wherein the second minimum feature size is different than the first minimum feature size;
• and
• establishing a physical communication path within the integrated circuit between the first layout zone and the second layout zone by using an interconnect zone wherein the interconnect zone surrounds the first layout zone, and wherein the second layout zone surrounds the interconnect zone.

A method of generating a layout database for an integrated circuit, comprising:

• generating a first layout database, the first layout database including a first data set for a first circuit adapted to be manufactured on the integrated circuit according to a first minimum feature size;
• generating a second layout database, the second layout database including a second data set for a second circuit adapted to be manufactured on the integrated circuit according to a second minimum feature size, wherein the second minimum feature size is different than the first minimum feature size;
• and
• combining the first and second databases to generate the layout database for the integrated circuit, wherein the first and second circuits in the combined layout database are adapted to be manufactured on the integrated circuit according to a third and a fourth minimum feature sizes, wherein the third minimum feature size is different than the fourth minimum feature size, and wherein the combined layout database includes a data set for establishing a physical communication path between the first and second circuits.