System for representing the logical and physical information of an integrated circuit
AssigneeXilinx, Inc.
InventorsDavid A. Knol, Salil Ravindra Raje
Life of this patent
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AssigneeXilinx, Inc.
InventorsDavid A. Knol, Salil Ravindra Raje
Estimating the term…
A floor planner tool for integrated circuit design which provides tools and displays for a designer to create a floor plan to define desired placement of circuits defined in a logical netlist by creating a physical hierarchy comprised of nested physical blocks (pblocks). Each pblock is a data structure which contains data which defines which circuits from the logical netlist are assigned to it. Each pblock stands alone and can be input to a place and route tool without the rest of the physical hierarchy. Each pblock data structure contains pointers to the circuits on the netlist assigned to that pblock, identifies other pblocks nested within it and contains a list of pins for the instances within the pblock. Net data structures in the physical hierarchy define which nets are connected to which pins.
A method of operating a computer to provide a floor planning tool to an integrated circuit designer, comprising the steps:
An apparatus comprising:
A computer readable medium having computer executable instructions thereon for controlling a computer to perform the following steps:
Dependencies are inferred from the claim text.