Interrupt efficiency across expansion busses
AssigneeCisco Technology, Inc.
InventorSampath Hosahally Kumar
Life of this patent
Estimating the term…
Abstract
A method of processing interrupts is described as well as processing devices. A processing device detects an indicator associated with an interrupt signal from an expansion device and transfers data related to the interrupt signal from the device across the expansion bus to a local memory. The device then process the data related to the interrupt.
Claims29
A method of processing interrupts, the method comprising:
- detecting an indicator of an interrupt signal from an expansion device residing on an expansion bus, wherein the detecting occurs at a local device on a local bus;
- transferring data related to the interrupt signal from the device across the expansion bus to a local memory and updating a memory access monitor bit in a memory access monitor status register;
- and
- processing the data related to the interrupt signal.
A method of processing interrupts, the method comprising:
- detecting interrupt signals at a processor;
- determining if the interrupt signals are from local devices or expansion devices that reside on an expansion bus;
- directing a direct memory access controller residing on a local bus with the processor to read a status register for any expansion devices that have generated interrupt signals;
- processing any interrupt signals from local devices;
- and
- processing any interrupt signals from devices located across the expansion bus.
A method of processing interrupts, the method comprising:
- detecting an update to a descriptor memory at a direct memory access controller local to a central processor;
- updating a register corresponding to the descriptor memory in a local status register;
- generating an interrupt to the central processor;
- identifying a device generating the update;
- and
- performing a task associated with the descriptor memory.
A method of processing interrupts, the method comprising:
- detecting an interrupt at a direct memory access controller residing on a local bus with a central processor from a device located across an expansion bus from the central processor;
- transferring data from the device to a local memory residing on the local bus;
- and
- generating an interrupt signal to the central processor when transfer is complete.
A device, comprising:
- a central processor having at least one direct memory access controller local to the processor,
- an expansion bus;
- at least one expansion device in communication with the central processor through the expansion bus;
- and
- at least one interrupt signal line electrically coupled between the direct memory access controller and the expansion bus.
A device, comprising:
- a central processor having at least one direct memory access controller local to the central processor;
- an expansion bus;
- at least one expansion device in communication with the central processor through the expansion bus;
- and
- a memory access monitor residing on a local bus with the central processor electrically coupled to a memory to detect updates to the memory made by an expansion device.
A device, comprising:
- means for detecting an interrupt indicator from an expansion device on an expansion bus at a device on a local bus;
- means for transferring data related to the interrupt signal from the device to a local memory on the local bus and for updating a memory access monitor bit in a memory access monitor status register;
- and
- means for processing the data related to the interrupt.
A device, comprising:
- means for detecting interrupt signals;
- means for determining sources of the interrupt signals;
- means for directing a direct memory access controller local to a central processor to read a status register for any expansion devices that have generated interrupt signals;
- means for processing any interrupt signals from local devices;
- and
- processing any interrupt signals from expansion devices.
A device, comprising:
- means for detecting an update to a descriptor memory, the means being local to a central processor;
- means for updating a register corresponding to the descriptor memory in a local status register;
- means for interrupting the central processor;
- means for identifying a device generating the update;
- and
- means for performing a task associated with the update.
A device, comprising:
- means for detecting an interrupt at a direct memory access controller local to a central processor from an expansion device on an expansion bus;
- means for transferring data from the device to a local memory;
- and
- means generating an interrupt signal to the central processor when transfer is complete.
Dependencies are inferred from the claim text.