Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer

A microcomputer structured on a semiconductor chip comprising:

• a non-volatile memory including a memory cell array having a matrix arrangement of a plurality of non-volatile memory cells which are adapted to operate selectively for erasing and writing by application of high voltages thereto, a plurality of signal lines for feeding said high voltages to said non-volatile memory cells, high voltage output drivers which are provided for said signal lines individually, output switching circuits for said high voltage output drivers, and a high voltage generation circuit which supplies high-voltage operational power to said high voltage output drivers;
• a CPU which is adapted to access said non-volatile memory;
• and
• a bus which connects between said non-volatile memory and said CPU,
• wherein each said high voltage output driver includes a series circuit having a first MOS transistor and a second MOS transistor in current paths of said high voltages, with a serial connection node thereof being a driver output terminal,
• wherein said first MOS transistor has drain-source voltage applied thereto in excess of a breakdown voltage during a voltage transition of a corresponding signal line from a high-voltage level to a low-voltage level,
• wherein said second MOS transistor has a drain-source voltage applied thereto in excess of a breakdown voltage during a transition of the corresponding signal line from a low-voltage level to a high-level voltage level, and
• wherein each said output switching circuit is coupled with a first control signal and a second control signal and operates in response to a switching command signal to switch states of said first and second MOS transistors of the corresponding high voltage output driver, such that one of said transistors in an on-state is switched to an off-state by outputting said first control signal to a gate terminal of said one transistor via a control signal line and the other one of said transistors is thereafter switched to said on-state by outputting said second control signal to a gate terminal of said other transistor via a second control signal line.

A semiconductor integrated circuit comprising:

• a signal line;
• a high voltage generation circuit;
• a high voltage output driver provided for said signal line and which derives operational power from high voltages supplied from said high voltage generation circuit;
• and
• a switching circuit,
• wherein said high voltage output driver includes a series circuit having a first MOS transistor and a second MOS transistor in current paths of said high voltages, with a serial connection node thereof being the driver output terminal,
• wherein said first MOS transistor has drain-source voltage applied thereto in excess of a breakdown voltage during a transition of said signal line from a high-voltage level to a low-voltage level,
• wherein said second MOS transistor has a drain-source voltage applied thereto in excess of a breakdown voltage during a transition of said signal line from a low-voltage level to a high-voltage level, and
• wherein said switching circuit is coupled with a first control signal and a second control signal to switch states of said first and second MOS transistors, such that one of said transistors in an on-state is switched to an off-state by outputting said first control signal to a gate terminal of said one transistor and the other one of said transistors is thereafter switched to an on-state by outputting said second control signal to a gate terminal of said other transistor.