Adaptive relative and absolute address coding CMOS imager technique and system architecture

An imaging system comprising:

• a photodiode (PD) pixel array employing time domain sampling, the PD pixel array having a plurality of CMOS pixel sensors arranged in columns and rows, each CMOS pixel sensor having an unfired state and a fired state;
• a plurality of D-Flip Flops containing respective column addresses of CMOS pixel sensors of a PD pixel array;
• a plurality of register switches corresponding to respective D-Flip Flops of the plurality of D-Flip Flops;
• a row select switch bank that couples a row of the PD pixel array to the plurality of register switches, the state of the plurality of register switches being based on a logic state configuration of the row of the PD pixel array, which forms a shift register from selected D-Flip Flops;
• a control logic device that controls the selection of rows of the PD pixel array for sampling and shifting addresses of CMOS pixel sensors in a selected row based on the fired state configuration of the selected row;
• and
• a plurality of logic devices configured to load addresses based on a combination of an absolute address technique and relative address coding technique, such that the addresses of CMOS pixel sensors in a row having a logic configuration of a “010” state are loaded into the shift register based on absolute address coding where the addresses of fired CMOS pixel sensors are loaded into the shift register, and the CMOS pixel sensors in a row having other logic configurations are loaded into the shift register based on relative address coding where the addresses of CMOS pixel sensors having transient logic states are loaded into the shift register, a distinguish bit being provided in the address to determine if a bit employs one of absolute address coding and relative address coding.

A method for reading image data from a photodiode (PD) pixel array employing time domain sampling, the PD pixel array having a plurality of CMOS pixel sensors that have a fired state and an unfired state, the method comprising:

• resetting a PD pixel array;
• capturing an image on the PD pixel array;
• scanning the PD pixel array for CMOS pixel sensors that have fired;
• associating a time index to the CMOS pixel sensors that have fired;
• repeating the scanning of the PD pixel array for CMOS pixel sensors and associating a time index to the CMOS pixel sensors that have fired until a predetermined time period expires, the associated time index corresponding to a respective brightness of incident light received by a corresponding CMOS pixel sensor,
• the transmitted addresses being based on an absolute address coding technigue, such that the fired pixel configuration is based on addresses of fired CMOS pixel sensors;
• and
• the transmitted addresses being based on a combination of an absolute address technique and relative address coding technique, such that the fired pixel configuration is based on CMOS pixel sensors in a row having a logic configuration of a “010” state employ absolute address coding where the addresses of fired CMOS pixel sensors are transmitted and the CMOS pixel sensors in a row having other logic configurations are transmitted based on relative address coding, such that addresses of CMOS pixel sensor having transient logic states are transmitted.