Low power analog to digital converter having reduced bias during an inactive phase

A circuit with reduced power consumption, comprising:

• first circuit means for switching between periodic active and inactive phases during operation of said first circuit means;
• second circuit means for communicating with said first circuit means and for switching between periodic active and inactive phases during operation of said second circuit means, wherein when said first circuit means is in said active phase, said second circuit means is in said inactive phase, and when said second circuit means is in said active phase, said first circuit means is in said inactive phase;
• and
• power supply means for communicating with said first and second circuit means and for providing first and second bias signals,
• wherein said power supply means selectively generates said first bias signal for said first circuit means during said active phase of said first circuit means, said second bias signal for said second circuit means during said inactive phase of said second circuit means, said second bias signal for said first circuit means during said inactive phase of said first circuit means, and said first bias signal for said second circuit means during said active phase of said second circuit means, and
• wherein said second bias signal is less than said first bias signal.

A method for reducing power consumption of a circuit, comprising:

• switching a first circuit between periodic active and inactive phases during operation of said first circuit;
• switching a second circuit between periodic active and inactive phases during operation of said second circuit, wherein when said first circuit is in said active phase, said second circuit is in said inactive phase and when said second circuit is in said active phase, said first circuit is in said inactive phase;
• and
• selectively generating a first bias signal for said first circuit during said active phase of said first circuit, a second bias signal for said second circuit during said inactive phase of said second circuit, said second bias signal for said first circuit during said inactive phase of said first circuit, and said first bias signal for said second circuit during said active phase of said second circuit,
• wherein said second bias signal is less than said first bias signal.

A multi-stage circuit with reduced power consumption, comprising:

• a first stage including a first circuit that has periodic active and inactive phases and that switches between said periodic active and inactive phases during operation of said first circuit, and a first power supply that selectively generates a first bias signal for said first circuit during said active phase of said first circuit and a second bias signal for said first circuit during said inactive phase of said first circuit;
• and
• a second stage including a second circuit that communicates with said first circuit, that has periodic active and inactive phases, and that switches between said periodic active and inactive phases during operation of said second circuit, and a second power supply that selectively generates said first bias signal for said second circuit during said active phase of said second circuit and said second bias signal for said second circuit during said inactive phase of said second circuit,
• wherein when said first circuit is in said active phase, said second circuit is in said inactive phase, and when said second circuit is in said active phase, said first circuit is in said inactive phase, and wherein said second bias signal is less than said first bias signal.