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US 7,071,858 B2Granted
Method and system for a glitch-free differential current steering switch circuit for high speed, high resolution digital-to-analog conversion
AssigneeBroadcom Corporation
InventorHui Pan
Life of this patent
Estimating the term…
Abstract
Provided are a method and system for reducing glitch in a switch circuit. A system includes a current-steering switch circuit including a main differential pair switch coupled to a first tail current having a first current value. Also included is an auxiliary differential pair switch connected to the main differential pair switch. The auxiliary differential pair switch is coupled to a second tail current and configured to substantially reduce a feed-through current associated with the main differential pair switch.
Claims20
A current-steering switch circuit, comprising:
- a main differential pair switch including a first transistor pair having respective first and second control nodes, first and second output nodes, and a tail current node;
- an auxiliary differential pair switch including a second transistor pair having respective first and second control nodes, first and second output nodes, and a tail current node;
- wherein the first and second control nodes of the main differential pair switch are coupled to the first and second control nodes, respectively, of the auxiliary differential pair switch;
- wherein the first and second output nodes of the main differential pair switch are cross-coupled to the second and first output nodes, respectively, of the auxiliary differential pair switch;
- whereby the first output node of the main differential pair switch and the second output node of the auxiliary differential pair switch form a first coupling node;
- whereby the second output node of the main differential pair switch and the first output node of the auxiliary differential pair switch form a second coupling node;
- a first tail current source, having a first current value, coupled to the main differential pair switch tail current node;
- a second tail current source, having a second current value that is lower than the first current value, coupled to the auxiliary differential pair switch tail current node;
- and
- a pair of cascode transistors coupled to the first and second coupling nodes, respectively, whereby the pair of cascode transistors regulate a voltage at the coupling nodes.
7 more elements
A digital-to-analog converter, comprising:
- an n-type Z/kZ ladder;
- a p-type Z/kZ ladder;
- and
- an array of differential switches coupled between the n-type Z/kZ ladder and the p-type Z/kZ ladder, wherein at least one of the differential switches includes;
- a main differential pair switch including a first transistor pair having respective first and second control nodes, first and second output nodes, and a tail current node;
- an auxiliary differential pair switch including a second transistor pair having respective first and second control nodes, first and second output nodes, and a tail current node;
- wherein the first and second control nodes of the main differential pair switch are coupled to the first and second control nodes, respectively, of the auxiliary differential pair switch;
- wherein the first and second output nodes of the main differential pair switch are cross-coupled to the second and first output nodes, respectively, of the auxiliary differential pair switch;
- whereby the first output node of the main differential pair switch and the second output node of the auxiliary differential pair switch form a first coupling node;
- whereby the second output node of the main differential pair switch and the first output node of the auxiliary differential pair switch form a second coupling node;
- a first tail current source, having a first current value, coupled to the main differential pair switch tail current node;
- a second tail current source, having a second current value that is lower than the first current value, coupled to the auxiliary differential pair switch tail current node;
- and
- a pair of cascode transistors coupled to the first and second coupling nodes, respectively, whereby the pair of cascode transistors regulate a voltage at the coupling nodes.
11 more elements
Dependencies are inferred from the claim text.