Constant voltage generating circuit
AssigneeAsahi Kasei Microsystems Co., Ltd.
InventorKenji Nemoto
Life of this patent
Estimating the term…
Abstract
A constant voltage generating circuit which uses a band gap reference circuit to produce a constant voltage and which is effective at reducing driving voltage and noise. The voltage generating circuit has a plurality of first bipolar transistors including n first bipolar transistors, each having an emitter area. The voltage generating circuit also includes a plurality of second bipolar transistors including n second bipolar transistors. Each of the n second bipolar transistors has an associated emitter area greater than the emitter area of each of the plurality of the first bipolar transistors. The constant voltage generating circuit produces a constant output voltage that is independent of temperature and the number of first and second transistors.
Claims7
A constant voltage generating circuit comprising:
- a plurality of first pnp transistors including n (an integer;
- 2≦n) first pnp transistors, a collector of each of the plurality of first pnp transistors being grounded, a base of a first one of the plurality of first pnp transistors being grounded, a base of a k (an integer;
- 2≦k≦n)-th one of the plurality of first pnp transistors being connected to an emitter of a (k−1)-th one of the plurality of first pnp transistors;
- a plurality of second pnp transistors including n second pnp transistors, each having an emitter area greater than that of each of the plurality of first pnp transistors, a collector of each of the plurality of second pnp transistors being grounded, a base of a first one of the plurality of second pnp transistors being grounded, a base of a k-th one of the plurality of second pnp transistors, except for another one of the plurality of second pnp transistors, being connected to an emitter of a (k−1)-th one of the plurality of second pnp transistors;
- primary current sources connected to the respective emitters of said plurality of first pnp transistors and the respective emitters of said plurality of second pnp transistors, except for an emitter of the first one of the plurality of second pnp transistors, to supply currents to the respective pnp transistors of said pluralities of first and second pnp transistors, two resistors being connected in series between the emitter of said first one of the plurality of second pnp transistors and the corresponding primary current source, a connection point between the two resistors being connected to the base of said another one of the plurality of second pnp transistors;
- and
- current control means including a first input terminal to which the emitter of a n-th one of the plurality of first pnp transistors is connected and a second input terminal to which the emitter of a n-th one of the plurality of second pnp transistors is connected, the current control means controlling currents from the primary current sources by outputting a control signal that controls the currents from said primary current sources so that a potential at said first input terminal and a potential at said second input terminal are the same.
A constant voltage generating circuit comprising:
- a plurality of first npn transistors including n (an integer;
- 2≦n) first npn transistors, a base and a collector of each of the plurality of first npn transistors being connected together, an emitter of a first one of the plurality of first npn transistors being grounded, an emitter of a k (an integer;
- 2≦k≦n)-th one of the plurality of first npn transistors being connected to a collector of a (k−1)-th one of the plurality of first npn transistors;
- a plurality of second npn transistors including n second npn transistors, each having an emitter area greater than that of each of the plurality of first npn transistors, a base and a collector of each of said plurality of second npn transistors being connected together, an emitter of a first one of the plurality of second npn transistors being grounded, an emitter of a k (an integer;
- 2≦k≦n)-th one of the plurality of second npn transistors, except another one of the plurality of second npn transistors, being connected to a collector of a (k−1)-th one of the plurality of second npn transistors;
- primary current sources connected respectively to the collector of a n-th one of said plurality of first npn transistors and to the collector of a n-th one of the plurality of second npn transistors to supply currents to the respective npn transistors of the pluralities of first and second npn transistors, said first one of the plurality of second npn transistors being connected to a corresponding primary current source via two resistors connected in series, a connection point between the two resistors being connected to an emitter of said another one of the plurality of second npn transistors;
- and
- current control means including a first input terminal to which the collector of said n-th one of the plurality of first npn transistors is connected and a second input terminal to which the collector of said n-th one of the plurality of second npn transistors is connected, the current control means controlling currents from said primary current sources by outputting a control signal that controls the currents from said primary current sources so that a potential at the first input terminal and a potential at the second input terminal are the same.
Dependencies are inferred from the claim text.