Programmable phase-locked loop circuitry for programmable logic device
AssigneeAltera Corporation
InventorGregory Starr
Life of this patent
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Abstract
A phase-locked loop (“PLL”) for use in a programmable logic device (“PLD”) is constructed with modular components, which may be digital, and which may be programmable or adjustable, in place of the conventional analog charge pump and loop filter. Connections are provided between those components and the remainder of the PLD so that if the PLL is not being used in a particular user design of the PLD, the PLL modular components may be used by other portions of the PLD. Similarly, those connections allow other portions of the PLD to be used in place of one or more of the modular components where more complex or special filtering than can be provided by the modular components is required.
Claims25
A loop circuit for use in a programmable logic device for outputting an output signal locked to a reference signal, said loop circuit comprising:
- a signal generator for producing said output signal;
- and
- a feedback path feeding said signal generator, said feedback path accepting as inputs said reference signal and said output signal, and causing said signal generator to drive said output to a lock with said reference, said feedback path comprising at least one component connected therein between said inputs and said signal generator;
- wherein:
- one or more of said at least one component is programmably connectable to another portion of said programmable logic device for operation of said another portion of said programmable logic device with said one or more of said at least one component.
Dependencies are inferred from the claim text.