Extraction of interconnect parasitics
AssigneeTexas Instruments Incorporated
InventorsAndrew Marshall, Victor C. Sutcliffe
Life of this patent
Estimating the term…
Abstract
The apparatus for detecting the effects of interconnect resistance and capacitance (RC) in a logic circuit includes a first ring oscillator with the interconnect RC parasitics in a logic circuit and a minimum reference ring oscillator without the interconnect RC parasitic in a logic circuit multiplexed to have common stages to obtain delay with and without the parasitics of the interconnect RC. The frequency difference between the first ring oscillator frequency and the minimum reference ring oscillator frequency is determined to detect the effects of the interconnect RC in the logic circuit.
Claims5
A method of measuring the effects of interconnect RC in a logic circuit comprising the steps of:
- multiplexing signals of a first oscillator with the interconnect RC parasitics and signals of a minimum reference oscillator using common stages with the first oscillator to obtain delay with and without interconnect parasitics to measure the delay attributed to interconnect parasitics.
A method of measuring the effects of interconnect RC in a logic circuit comprising the steps of:
- multiplexing signals of a minimum reference oscillator with minimum delay due to parasitics and signals of a plurality of other oscillators each with oscillator interconnect RC parasitics to be measured, said plurality of other oscillators and said minimum reference oscillator using mostly common stages to obtain delay with and without interconnect parasitics to measure the delay attributed to interconnect parasitics.
Dependencies are inferred from the claim text.