Design of beol patterns to reduce the stresses on structures below chip bondpads
AssigneeInternational Business Machines Corporation
InventorsElie Awad, Mariette A. Awad, Kai D. Feng
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsElie Awad, Mariette A. Awad, Kai D. Feng
Estimating the term…
A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.
A semiconductor structure comprising:
A method for forming a stress diverting semiconductor structure, said method comprising:
Dependencies are inferred from the claim text.