Lead frame decoupling capacitor, semiconductor device packages including the same and methods

A semiconductor device assembly, comprising:

• a semiconductor die including a plurality of bond pads on an active surface thereof;
• a lead frame positioned at least partially over the active surface, the lead frame including:
• a first lead frame layer comprising:
• a first plurality of leads in a first group, at least some leads of the first plurality electrically connected to corresponding bond pads of the plurality of bond pads;
• and
• a first bus at least partially superimposed with respect to the active surface;
• and
• a second lead frame layer comprising:
• a second plurality of leads in at least one second group, at least some leads of the second plurality of leads electrically connected to other corresponding bond pads of the plurality of bond pads;
• and
• a second bus at least partially superimposed with respect to the first bus;
• a first dielectric element between the lead frame and the active surface;
• and
• a second dielectric element between the first lead frame layer and the second lead frame layer, at least superimposed portions of the first lead frame layer, the second dielectric element, and the second lead frame layer forming a decoupling capacitor.

A lead frame assembly, comprising:

• a first lead frame layer, including:
• a first bus;
• and
• a first group of leads oriented substantially parallel to one another;
• a second lead frame layer at least partially superimposed with respect to the first lead frame layer, the second lead frame layer including:
• a second bus at least partially superimposed with respect to the first bus;
• and
• at least one second group of leads oriented substantially parallel to one another, the first and second lead frame layers mutually defining a common bottom edge of the lead frame assembly, the first and second groups of leads extending from the common bottom edge;
• and
• a dielectric element positioned at least partially between the first bus and the second bus.

A decoupling capacitor, comprising:

• a dielectric element configured to be positioned over at least a portion of an active surface of a semiconductor device:
• a first electrode positioned on the dielectric element and comprising at least a portion of a bus of a first lead frame layer, the first lead frame layer also comprising a first group of leads in substantially mutually parallel orientation;
• another dielectric element superimposed with respect to at least a portion of the bus;
• and
• a second electrode on an opposite side of the another dielectric element from the first electrode and superimposed with respect to the first electrode, the second electrode comprising at least a portion of a bus of a second lead frame layer, the second lead frame layer also comprising at least one second group of leads in substantially mutually parallel orientation.