# US 7,071,094 B2 · Dual layer barrier film techniques to prevent resist poisoning

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- Number: US 7,071,094 B2
- Document ID: US7071094B2
- Status: Granted
- Kind: B2
- Application number: 10/893,659
- Filed: 2004-07-16
- Published: 2004-12-16
- Granted: 2006-07-04
- Earliest claimed: 2001-06-28
- Assignees: LSI Logic Corporation
- Inventors: Hong-Qiang Lu; Wei-Jen Hsia; Wilbur G. Catabay
- Web page: https://patentgrep.com/patent/US7071094B2

## CPC

- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10P 50/73: {using masks for insulating materials}
- H10W 20/075: {of multilayered thin functional dielectric layers}
- H10W 20/084: {for dual-damascene structures}
- H10W 20/085: {involving intermediate temporary filling with material}
- H10W 20/086: {involving buried masks}
- H10P 14/6905: {being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Provided is a process for forming a barrier film to prevent resist poisoning in a semiconductor device by depositing a second nitrogen-free barrier layer on top of a first barrier layer containing nitrogen. A low-k dielectric layer is formed over the second barrier layer. This technique maintains the low electrical leakage characteristics of the first barrier layer and reduces nitrogen poisoning of a photoresist layer subsequently applied.

## Claims

### Claim 1

A process for forming a dual layer barrier film to prevent diffusion of nitrogen into a photoresist layer used in patterning a semiconductor device, comprising:
depositing a first barrier layer containing silicon carbide and nitrogen directly on an interconnect conductor, such that the first barrier layer adjacently contacts the interconnect conductor;
depositing a nitrogen-free second barrier layer comprising silicon carbide directly on the first barrier layer, such that the second barrier layer adjacently contacts the first barrier layer;
forming a first low-k dielectric layer over the second barrier layer; and
depositing a photoresist material to form a photoresist layer above at least a portion of the first dielectric layer.

### Claim 2 (depends on 1)

The process of claim 1, further comprising patterning, and etching the photoresist layer to form a photoresist mask.

### Claim 3 (depends on 1)

The process of claim 1, wherein the process tool used to deposit the first barrier layer is used to deposit the nitrogen-free second barrier layer.

### Claim 4 (depends on 1)

The process of claim 1, wherein depositing a first barrier layer containing silicon carbide and nitrogen comprises using a PECVD process and one of NH3, N2, and N2O as a chemical precursor to supply to nitrogen.

### Claim 5 (depends on 4)

The process of claim 4, wherein depositing a nitrogen-free second barrier layer comprises using the PECVD process recited in claim 4 and turning off the supply of nitrogen.

### Claim 6 (depends on 1)

The process of claim 1, wherein the nitrogen-free silicon carbide barrier layer is formed by injecting an SiHx(CH3)y gas, where x is chosen in the range of 0 to 3, and x+y=4.

### Claim 7 (depends on 1)

The process of claim 1, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer and forming a second low-k dielectric layer on top of the etch stop layer;
patterning the photoresist layer to form a photoresist mask over the second low-k dielectric layer where a via is to be formed;
forming the via by etching through the second low-k dielectric layer, the etch stop layer, and the first low-k dielectric layer using the photoresist mask;
removing the photoresist mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second low-k dielectric layer where a trench is to be formed; and
forming a trench in the second low-k dielectric layer by etching using the second photoresist mask to complete a dual damascene structure.

### Claim 8 (depends on 1)

The process of claim 1, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer and forming a second low-k dielectric layer on top of the etch stop layer;
patterning the photoresist layer to form a photoresist mask over the second low-k dielectric layer where a trench is to be formed;
forming the trench in the second low-k dielectric layer by etching using the photoresist mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second dielectric layer and the trench; and
forming a via in the first dielectric layer by etching to complete a dual damascene structure.

### Claim 9 (depends on 1)

The process of claim 1, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer;
patterning the photoresist layer to form a photoresist mask over the etch stop layer where a via is to be formed;
forming a via mask by etching through the etch stop layer;
removing the photoresist mask;
depositing a second low-k dielectric layer on top of the via mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second low-k dielectric layer where a trench is to be formed and
forming a trench and via by etching through the second and first low-k dielectric layers in one process step to complete a dual damascene structure.

### Claim 10

A process for forming a barrier film to prevent poisoning a photoresist material used in forming a semiconductor device, comprising:
depositing a first barrier layer containing silicon carbide and nitrogen on a surface located to control electrical leakage from a conductor, such that the first barrier layer adjacently contacts the surface;
depositing a nitrogen-free second barrier layer comprising silicon carbide directly on top of the first barrier layer, such that the second barrier layer adjacently contacts the first barrier layer;
forming first and second low-k dielectric layers over the second barrier layer; and
depositing a photoresist material to form a photoresist layer above at least a portion of the first low-k dielectric layer.

### Claim 11 (depends on 10)

The process of claim 10, further comprising patterning, and etching the photoresist layer to form a photoresist mask.

### Claim 12 (depends on 10)

The process of claim 10, wherein the process tool used to deposit the first barrier layer is used to deposit the nitrogen-free second barrier layer.

### Claim 13 (depends on 10)

The process of claim 10, wherein depositing a first barrier layer containing silicon carbide and nitrogen comprises using a PECVD process and one of NH3, N2, and N2O as a chemical precursor to supply the nitrogen.

### Claim 14 (depends on 13)

The process of claim 13, wherein depositing a nitrogen-free second barrier layer comprises using the PECVD process recited in claim 13 and turning off the supply of nitrogen.

### Claim 15 (depends on 10)

The process of claim 10, wherein the nitrogen-free silicon carbide barrier layer is formed by injecting an SiHx(CH3)y gas, where x is chosen in the range of 0 to 3, and x+y=4.

### Claim 16 (depends on 10)

The process of claim 10, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer and forming the second low-k dielectric layer on top of the etch stop layer;
patterning the photoresist layer to form a photoresist mask over the second low-k dielectric layer where a via is to be formed;
forming the via by etching through the second low-k dielectric layer, the etch stop layer, and the first low-k dielectric layer using the photoresist mask;
removing the photoresist mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second low-k dielectric layer where a trench is to be formed; and
forming a trench in the second low-k dielectric layer by etching using the second photoresist mask to complete a dual damascene structure.

### Claim 17 (depends on 10)

The process of claim 10, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer and forming the second low-k dielectric layer on top of the etch stop layer,
patterning the photoresist layer to form a photoresist mask over the second low-k dielectric layer where a trench is to be formed;
forming the trench in the second low-k dielectric layer by etching using the photoresist mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second dielectric layer and the trench; and
forming a via in the first dielectric layer by etching to complete a dual damascene structure.

### Claim 18 (depends on 10)

The process of claim 10, further comprising:
prior to depositing said photoresist material, forming an etch stop layer on top of the second barrier layer
patterning the photoresist layer to form a photoresist mask over the etch stop layer where a via is to be formed;
forming a via mask by etching through the etch stop layer;
removing the photoresist mask;
depositing the second low-k dielectric layer on top of the via mask;
forming and patterning a second photoresist layer to form a second photoresist mask over the second low-k dielectric layer where a trench is to be formed; and
forming a trench and via by etching through the second and first low-k dielectric layers in one process step to complete a dual damascene structure.