# US 7,071,075 B2 · STI forming method for improving STI step uniformity

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- Number: US 7,071,075 B2
- Document ID: US7071075B2
- Status: Granted
- Kind: B2
- Application number: 10/728,983
- Filed: 2003-12-08
- Published: 2005-06-09
- Granted: 2006-07-04
- Earliest claimed: 2003-12-08
- Assignees: Nanya Technology Corporation
- Inventors: Chung-Peng Hao; Yi-Nan Chen
- Web page: https://patentgrep.com/patent/US7071075B2

## CPC

- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/0143: {comprising concurrently refilling multiple trenches having different shapes or dimensions}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Disclosed is a shallow trench isolation (STI) forming method for improving STI step uniformity. The method deposits an oxidation layer to a semiconductor structure formed with STIs. After a planarization material layer is formed on the oxidation, then CMP process is performed. By using the method of the present invention, the STI step uniformity can be raised.

## Claims

### Claim 1

An STI forming method for improving STI step uniformity in a semiconductor device, said method comprising the steps of:
providing a substrate;
forming a pad oxide layer on said substrate;
forming a pad nitride layer on said substrate, so as to constitute an intermediate structure including the substrate, pad oxide layer and pad nitride layer;
forming shallow trench isolations in said intermediate structure, said shallow trench isolations having different depths;
forming an oxide layer on the whole structure, the shallow trench isolations being filled with said oxide layer, causing the portions of the oxide layer at the shallow trench isolations having different depths to have different heights;
forming a planarization material layer on said oxide layer to offset said different heights such that said planarization material layer has a substantially planar top surface; and
performing planarization process to remove said planarization material layer and planarize the top surfaces of said oxide layer and said pad nitride layer.

### Claim 2 (depends on 1)

The method as claimed in claim 1, wherein the planarization material layer comprises BPSG.

### Claim 3 (depends on 2)

The method as claimed in claim 2, further comprising a step of heating the planarization material layer so that said planarization material layer reflows, after the step of forming the planarization material layer.

### Claim 4 (depends on 1)

The method as claimed in claim 1, wherein the planarization material layer comprises anti-reflective material.

### Claim 5 (depends on 1)

The method as claimed in claim 1, wherein the planarization process comprises CMP.

### Claim 6 (depends on 1)

The method as claimed in claim 1, wherein the pad nitride layer comprises silicon nitride.