Method of forming a dual-sided capacitor
AssigneeMicron Technology, Inc.
InventorsEr-Xuan Ping, Shenlin Chen
Life of this patent
Estimating the term…
Abstract
A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon (HSG) as part of a dual-sided lower capacitor electrode. Prior to the dielectric formation, the lower capacitor electrode may be optionally annealed to improve capacitance.
Claims33
A method of forming a capacitor comprising:
- forming a hemispherical grained polysilicon layer over a substrate;
- subjecting said hemispherical grained polysilicon layer to a cleaning solution to remove impurities from said hemispherical grained polysilicon layer and to obtain a cleaned hemispherical grained polysilicon layer;
- forming a native oxide layer over said cleaned hemispherical grained polysilicon layer, said native oxide layer being formed to a thickness of about 5 Angstroms to about 50 Angstroms;
- forming an amorphous silicon layer over said native oxide layer;
- subjecting said amorphous silicon layer to a seeding treatment;
- forming a dielectric layer over at least a portion of an outer side of said cleaned hemispherical grained polysilicon layer and said amorphous silicon layer;
- and
- forming a conductive layer over said dielectric layer.
A method of forming a capacitor comprising:
- forming a hemispherical grained polysilicon layer over a substrate;
- forming a native oxide layer over said hemispherical grained polysilicon layer by an in-situ atomic layer deposition employing a silicon source precursor and an oxygen source;
- forming an amorphous silicon layer over said native oxide layer;
- forming a dielectric layer over at least a portion of an outer side of said hemispherical grained polysilicon layer and said amorphous silicon layer;
- and
- forming a conductive layer over said dielectric layer.
A method of forming a capacitor comprising:
- forming a hemispherical grained polysilicon layer over a substrate;
- forming a native oxide layer over said hemispherical grained polysilicon layer by an ex-situ atomic layer deposition employing a silicon source precursor and an oxygen source;
- forming an amorphous silicon layer over said native oxide layer;
- forming a dielectric layer over at least a portion of an outer side of said hemispherical grained polysilicon layer and said amorphous silicon layer;
- and
- forming a conductive layer over said dielectric layer.
A method of forming a capacitor comprising:
- forming a hemispherical grained polysilicon layer over a substrate;
- forming a native oxide layer over said hemispherical grained polysilicon layer by thermal growth at a temperature of less than about 900° C. for about 1 second to about 10 minutes;
- forming an amorphous silicon layer over said native oxide layer;
- forming a dielectric layer over at least a portion of an outer side of said hemispherical grained polysilicon layer and said amorphous silicon layer;
- and
- forming a conductive layer over said dielectric layer.
A method of reducing the diffusivity of silicon atoms of a lower capacitor electrode, comprising:
- providing a doped polysilicon layer in an opening formed within a semiconductor substrate, said doped polysilicon layer comprising hemispherical grained polysilicon grains having a first thickness;
- providing a native oxide layer over said doped polysilicon layer;
- and
- providing a layer of hemispherical grained polysilicon over said native oxide layer, said layer of hemispherical grained polysilicon comprising grains of a second thickness, wherein said second thickness is greater than said first thickness.
Dependencies are inferred from the claim text.