# US 7,071,053 B2 · Method of forming capacitor with ruthenium top and bottom electrodes by MOCVD

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- Number: US 7,071,053 B2
- Document ID: US7071053B2
- Status: Granted
- Kind: B2
- Application number: 10/852,121
- Filed: 2004-05-25
- Published: 2004-10-28
- Granted: 2006-07-04
- Earliest claimed: 1998-10-14
- Assignees: Hitachi, Ltd.
- Inventors: Toshihide Nabatame; Takaaki Suzuki; Tetsuo Fujiwara; Kazutoshi Higashiyama
- Web page: https://patentgrep.com/patent/US7071053B2

## CPC

- H10D 1/682: {having dielectrics comprising perovskite structures}
- C23C 16/18: from metallo-organic compounds
- C23C 16/40: Oxides
- H10D 1/692: {Electrodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)

## Abstract

A semiconductor device containing a dielectric capacitor having an excellent step coverage for a device structure of high aspect ratio corresponding to high integration degree, as well as a manufacturing method therefor are provided. A dielectric capacitor of high integration degree is manufactured by forming a bottom electrode 46 and a top-electrode 48 comprising a homogeneous thin Ru film with 100% step coverage while putting a dielectric 47 therebetween on substrates 44, 45 having a three-dimensional structure with an aspect ratio of 3 or more by a MOCVD process using a cyclopentadienyl complex within a temperature range from 180° C. or higher to 250° C. or lower.

## Claims

### Claim 1

A method of manufacturing a semiconductor device having a dielectric capacitor including a bottom electrode, a dielectric layer and a top electrode on an underlying substrate having a three-dimensional structure, comprising:
providing a silicon substrate having a first insulation layer comprising SiO2 thereon, and
a second insulation layer comprising SiO2 formed on said first insulation layer, said second insulation layer having a hole formed therein;
forming a bottom electrode on side wall of said hole and a surface of said first insulation layer in a bottom of the hole;
forming a third insulation layer on the top surface of said second insulation layer;
forming a dielectric layer covering said bottom electrode and said third insulation layer, wherein the said third insulation layer is a MgO layer or a Al2O3 layer;
forming a top electrode on said dielectric layer;
wherein the bottom electrode and the top electrode are formed by a metalorganic chemical vapor deposition process at 300° C. or higher and 500° C. or lower using a β-diketone ruthenium complex as the precursor,
one of O2, H2, N2O, O3, CO and CO2 is used as a reaction gas, and the volume ratio of the reaction gas to a carrier gas is 1% or more.

### Claim 2 (depends on 1)

A method of manufacturing a semiconductor device as defined in claim 1, wherein said β-diketone ruthenium complex is dissolved into a solvent selected from the group of tetrahydrofuran, toluene, hexane and octane, and the solution of said β-diketone ruthenium complex being used for a liquid carrying and evaporation, metalorganic chemical vapor deposition process.

### Claim 3 (depends on 2)

A method of manufacturing a semiconductor device as defined in claim 2, wherein said β-diketone ruthenium complex is dissolved in said solvent in an amount of 0.05 mol/l or more.

### Claim 4 (depends on 1)

A method of manufacturing a semiconductor device as defined in claim 1, wherein said reaction gas is selected from the group consisting of O2, H2, CO and CO2, and a carbon content of said bottom electrode and said top electrode is 10−2 at % or more and 1 at % or less analyzed by secondary ion mass spectroscopy.

### Claim 5 (depends on 1)

A method of manufacturing a semiconductor device as defined in claim 1, wherein said β-diketone ruthenium complex is a dibivaloylmethanate ruthenium complex.

### Claim 6 (depends on 1)

A method of manufacturing a semiconductor device as defined in claim 1, wherein said dibivaloylmethanate ruthenium complex has the following structure
wherein R′=C(CH3)3, CH3 or CH3.
