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US 7,071,047 B1Granted
Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions
AssigneeInternational Business Machines Corporation
InventorsToshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III
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Abstract
Semiconductor structures and method of forming semiconductor structures. The semiconductor structures including nano-structures or fabricated using nano-structures. The method of forming semiconductor structures including generating nano-structures using a nano-mask and performing additional semiconductor processing steps using the nano-structures generated.
Claims34
A method of forming a semiconductor structure, comprising:
- (a) providing a single crystal silicon substrate;
- (b) forming a hard mask layer on a top surface of said substrate;
- (c) forming a nano-mask layer on a top surface of said hard mask layer without performing a photolithographic process, said nano-mask layer having a masking pattern;
- (d) etching said masking pattern into said hard mask layer to form a patterned hard mask layer having openings, said openings extending from a top surface of said patterned hard mask layer to said top surface of said substrate, wherein said openings, distances between said openings, or both said openings and said distances between said openings independently have at least one spatial extent extending parallel to said top surface of said patterned hard mask layer;
- and
- (e) after removing said nano-mask layer, forming a single crystal group IV semiconductor layer on a top surface of said patterned hard mask layer, said single crystal group IV semiconductor layer filling said openings in said patterned hard mask layer.
3 more elements
A method of forming a semiconductor structure, comprising:
- (a) providing a single crystal silicon substrate;
- (b) forming a dummy gate on a top surface of said substrate;
- (c) forming a nano-mask layer on a top surface of said substrate and on a top surface of said dummy gate without performing a photolithographic process, said nano-mask layer having a masking pattern;
- (d) etching said masking pattern into said substrate wherever said substrate is not covered by said dummy gate to form a patterned silicon region having openings in said substrate, said openings extending from a top surface of said substrate a predetermined distance into said substrate, wherein said openings, distances between said openings, or both said openings and said distances between said openings independently have at least one spatial extent extending parallel to said top surface of said patterned layer;
- (e) after removing said nano-mask layer, forming a protective layer on said top surface of said substrate and on sidewalls of said openings;
- (f) oxidizing said substrate exposed in bottoms of said openings to form a buried patterned silicon dioxide layer;
- (g) removing said protective layer from said sidewalls of said openings;
- and
- (h) filling said openings with a single crystal group IV semiconductor material.
6 more elements
A method of forming a semiconductor structure, comprising:
- (a) providing a single crystal silicon substrate;
- (b) forming a dummy gate on a top surface of said substrate;
- (c) forming a nano-mask layer on a top surface of said substrate and on a top surface of said dummy gate without performing a photolithographic process, said nano-mask layer having a masking pattern;
- (d) etching said masking pattern into said substrate wherever said substrate is not covered by said dummy gate to form openings in said substrate, said openings extending from a top surface of said substrate a predetermined distance into said substrate, wherein said openings, distances between said openings, or both said openings and said distances between said openings independently have at least one spatial extent extending parallel to said top surface of said patterned layer;
- and
- (e) annealing said substrate to reflow silicon adjacent to said top surface of said substrate, sealing off said openings from said top surface of said substrate and coalescing said openings into buried voids.
3 more elements
Dependencies are inferred from the claim text.