# US 7,071,033 B2 · Method for forming semiconductor device including stacked dies

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- Number: US 7,071,033 B2
- Document ID: US7071033B2
- Status: Granted
- Kind: B2
- Application number: 10/888,769
- Filed: 2004-07-08
- Published: 2005-01-06
- Granted: 2006-07-04
- Earliest claimed: 2001-03-12
- Assignees: Fairchild Semiconductor Corporation
- Inventors: Maria Cristina B. Estacio
- Web page: https://patentgrep.com/patent/US7071033B2

## CPC

- H10W 90/811: {Multiple chips on leadframes}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/07636: {Soldering or alloying}
- H10W 72/07637: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy}
- H10W 72/652: {comprising metals or metalloids, e.g. silver}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/766: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device including a leadframe and two stacked dies, a first of which is on a top surface of a leadframe while the second one is on a bottom surface of the leadframe. The drain region of the first die is coupled to a drain clip assembly that includes a drain clip that is in contact with a lead rail. The body of the semiconductor device includes a window or opening that exposes the drain region of the second die.

## Claims

### Claim 1

A method comprising:
providing a leadframe including a plurality of leads, a first source attach area on a first surface of the leadframe and a first gate attach area, and a second source attach area on a second surface of the leadframe and a second gate attach area;
attaching at least two dies to the leadframe, a first die being electrically coupled to the first source and gate attach areas of the leadframe and a second die being electrically coupled to the second source and gate attach areas of the leadframe;
attaching a drain connection assembly to a drain region of the first die; and,
forming a body around at least a portion of the first die and the second die, such that at least a drain region of the second die is exposed by the body,
wherein the first and second dies are in a stacked relationship and are at opposite sides of the leadframe, and wherein the drain region of the first die faces away from the leadframe and the drain region of the second die faces away from the leadframe.

### Claim 2 (depends on 1)

The method of claim 1 wherein at least one of the dies is a bumped die.

### Claim 3 (depends on 2)

The method of claim 2 wherein both dies are bumped dies.

### Claim 4 (depends on 2)

The method of claim 2 wherein the drain connection assembly comprises a drain clip and a side rail adjacent an edge of the drain clip.

### Claim 5 (depends on 2)

The method of claim 2 wherein the drain connection assembly comprises a drain clip and a side rail adjacent an edge of the drain clip, and wherein the side rail comprises a v-groove.

### Claim 6 (depends on 2)

The method of claim 2 wherein the drain connection assembly comprises a drain clip and a side rail adjacent an edge of the drain clip, and wherein the side rail comprises a v-groove, and wherein the drain clip comprises copper.

### Claim 7

A method of making a semiconductor device, the method comprising:
providing a leadframe including a plurality of leads extending therefrom, a first source attach area on a first surface of the leadframe and a first gate attach area, and a second source attach area on a second surface of the leadframe and a second gate attach area;
bonding a first die to the first source and gate attach areas with solder;
reflowing the solder;
bonding a second die to the second source and gate attach areas with second solder;
bonding a drain connection assembly to a drain region of the second die with third solder;
reflowing at least the third solder; and
coupling a body to the semiconductor device such that a drain region of the second die is exposed.

### Claim 8 (depends on 7)

A method in accordance with claim 7 further comprising reflowing the second solder prior to bonding the drain connection assembly to the drain region of the second die.