Nonvolatile memory card

A memory card comprising:

• an nonvolatile memory;
• and a control circuit,
• wherein said nonvolatile memory has, in a part of a memory array, an erase table in which a free-space information flag is associated with each physical address of a memory area,
• wherein said free-space information flag has one of a first status and a second status,
• wherein said first status is indicating that the corresponding memory area is permitted to be erased and said second status indicating that the corresponding memory area is inhibited to be erased,
• wherein said control circuit uses a first physical address according to the free-space information flag in the first status obtained by searching said erase table as a memory area to which rewrite data is written, and
• wherein said control circuit is adapted to store into a predetermined area of said nonvolatile memory an updated version of the erase table, which includes an updated free-space information flag from a previous version of the erase table, the predetermined area being a different area than an area in which the previous version of the erase table is stored.

A memory card comprising:

• nonvolatile memory;
• and a control circuit,
• wherein a memory array of said nonvolatile memory has an erase table and an address translation table, wherein a free-space information flag in said erase table is associated with each physical address of a memory area, wherein a physical address of a memory area in said address translation table is associated with each logical address, wherein said free-space information flag indicates whether a corresponding memory area is permitted to be erased or not,
• wherein said control circuit determines a physical address of a memory area to which rewrite data is written by referring to the free-space information flag of said erase table, updates the address translation table by associating the physical address of the memory area with the logical address and updates the free-space information flag of the erase table, and
• wherein said control circuit is adapted to store into a predetermined area of said nonvolatile memory an updated version of the erase table, which includes an updated free-space information flag from a previous version of the erase table, the predetermined area being a different area than an area in which the previous version of the erase table is stored.

A memory card comprising:

• nonvolatile memory;
• and a control circuit,
• wherein a memory array of said nonvolatile memory has an erase table and an address translation table,
• wherein a free-space information flag in said erase table is associated with each physical address of a memory area and said free-space information flag indicateswhether the corresponding memory area is permitted to be erased or not,
• wherein a physical address of a memory area in said address translation table is associated with each logical address, and
• wherein, at the time of rewriting stored information, said control circuit reads an address translation table corresponding to a logical address to be rewritten into a buffer, obtains a physical address of rewrite data from the read address translation table, reads a first memory area of the obtained physical address, stores the read data into the buffer, reads a first erase table corresponding to said obtained physical address into the buffer, reads a second erase table used to retrieve a second memory area to which rewrite data is written into the buffer, determines said second memory area to which rewrite data is written by referring to a free-space information flag of said second erase table, merges said stored data with data which is input from the outside, writes said merged data as rewrite data into said determined memory area, updates a correspondence between the physical address of said second memory area and the logical address on the address translation table read into the buffer, updates the free-space information flag on the first erase table and said second erase table read into the buffer, and writes the updated erase table and the updated address translation table into a flash memory.

A memory card comprising an nonvolatile memory,

• wherein said nonvolatile memory includes, in a part of a memory array, an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of the memory area is associated with each logical address,
• wherein said free-space information flag has a first status indicating that the corresponding memory area is permitted to be erased and a second status indicating that the corresponding memory area is inhibited to be erased,
• wherein a memory area to which rewrite data is to be written is determined by a physical address according to the free-space information flag in the first status retrieved, and
• wherein an updated version of the erase table, which includes an updated free-space information flag from a previous version of the erase table, is stored into a predetermined area of said nonvolatile memory, the predetermined area being a different area than an area in which the previous version of the erase table is stored.