Algorithm for full-chip resistance extraction
AssigneeSun Microsystems, Inc.
InventorGoetz E. Leonhardt
Life of this patent
Estimating the term…
Abstract
A method to convert a wire layout geometry to a filament topology for determination of chip resistance is provided. The method includes resolving overlap of layout segments of the wire layout geometry and inserting a vertical filament into each of the layout segments. The method further includes connecting vertical filaments using lateral connections and merging connected parallel filaments. The method also includes removing open filaments and modifying the filament structure in a bend region based on relative dimensions of the vertical filaments within the bend region.
Claims24
A method to convert a wire layout geometry to a filament topology for determination of chip resistance, comprising:
- resolving overlap of layout segments of the wire layout geometry;
- inserting a vertical filament into each of the layout segments;
- connecting vertical filaments using lateral connections;
- merging connected parallel filaments;
- removing open filaments;
- and
- modifying a filament structure in a bend region based on relative dimensions of the vertical filaments within the bend region.
A computer readable media having program instructions to convert a wire layout geometry to a filament topology for determination of chip resistance, the computer readable media comprising:
- program instructions for resolving overlap of layout segments;
- program instructions for inserting a vertical filament into each of the layout segments;
- program instructions for connecting vertical filaments using lateral connections;
- program instructions for merging connected parallel filaments;
- program instructions for removing open filaments;
- and
- program instructions for modifying a filament structure in a bend region based on relative dimensions of vertical filaments within the bend region.
A method to convert a wire layout geometry to a filament topology for determination of chip resistance, comprising:
- resolving overlap of layout segments;
- inserting a vertical filament into each of the layout segments;
- connecting vertical filaments using lateral connections;
- merging connected parallel filaments;
- removing open filaments;
- and
- modifying a filament structure within a bend region including generating a particular filament structure in the bend region, the particular filament structure corresponding to particular dimensional ratios of the vertical filaments within the bend region.
Dependencies are inferred from the claim text.