Real-time processor executing predetermined operation defined by program correctly at predetermined time
AssigneeSharp Kabushiki Kaisha
InventorMasafumi Takahashi
Life of this patent
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Abstract
A real-time processor includes a clock register updating a time at a predetermined interval, a time register storing an arbitrary time, a time comparator comparing the time in the clock register with the time stored in the time register, and an instruction processing unit executing an instruction whose execution status is altered according to the comparison result of the time comparator. A predetermined operation can be carried out correctly at a predetermined time since the instruction processing unit executes an instruction whose execution status is altered according to the comparison result of the time comparator.
Claims20
A real-time processor comprising:
- a clock register updating a time at a predetermined interval;
- a time register storing an arbitrary time point as a time when execution of an instruction is to be completed;
- a time comparator comparing the time of said clock register and the arbitrary time point stored in said time register;
- and
- an instruction processing unit executing the instruction, whose execution status is altered according to a comparison result of said time comparator, where said arbitrary time point is set by said instruction processing unit and independent of the time in said clock register,
- wherein said time comparator detects that the time of said clock register matches the time stored in said time register, and detects that the time in said clock register is greater than the time stored in said time register, and
- said instruction processing unit executes a time dependent instruction, for the associated instruction having altered status, that delays completion of execution of the instruction having altered status until said time comparator detects that the time in said clock register matches or that the time in said clock register is greater than the time point stored in said time register.
An instruction execution method of a processor, comprising the steps of:
- updating a time at a predetermined interval;
- storing an arbitrary time point independent of said updated time, as a time when execution of an instruction is to be completed;
- comparing said updated time with said stored arbitrary time point, including detecting that the time matches the stored arbitrary time point and detecting that the time is greater than the stored arbitrary time point;
- executing the instruction, whose execution status is altered according to a comparison result from the comparing of said updated time with said stored arbitrary time point;
- executing a time-dependent instruction, for the associated executing instruction, that delays a completion of said executing instruction until said comparison result indicates that the time matches the stored arbitrary time point or indicates that the time is greater than the stored arbitrary time point;
- and
- storing said comparison result of said time comparator in a flag register at a time point when said time dependent instruction has been executed by said execution step, wherein an execution status of an execution time dependent instruction is altered according to a value of said flag register.
A real-time processor comprising:
- a clock register updating a time at a predetermined interval;
- a time register storing an arbitrary time point independent of said updated time, as a time that execution of an instruction is to be completed;
- a time comparator comparing the time of said clock register and the arbitrary time point stored in said time register, detecting that the time of said clock register matches the time stored in said time register, and detecting that the time of said clock register is greater than the time stored in the time register;
- an instruction processing unit executing the instruction, whose execution status is altered according to a comparison result of said time comparator, wherein said instruction processing unit executes a time-dependent instruction depending upon said comparison result of said time comparator;
- and
- a flag register storing said comparison result of said time comparator at a time point when said time dependent instruction has been executed by said instruction processing unit,
- wherein said instruction processing unit executes an execution time dependent instruction, for the associated executing instruction, that delays completion of said executing instruction until said comparator detects that the time in said clock register matches or that the time in said clock register is greater than the time point stored in said time register.
Dependencies are inferred from the claim text.