Back to results
US 7,069,367 B2Granted
Method and apparatus for avoiding race condition with edge-triggered interrupts
AssigneeIntel Corporation
InventorsDavid I. Poisner, Leslie E. Cline
Life of this patent
Estimating the term…
Abstract
An embodiment of a system for avoiding race conditions when using edge-triggered interrupts includes a processor that asserts an interrupt pending signal in response to the receipt of an edge-triggered interrupt. A power management device receives the interrupt pending signal. If the processor is in a low power state when it asserts the interrupt pending signal, then the power management device causes the processor to enter a high power state to allow the processor to service the pending interrupt.
Claims12
A method, comprising:
- asserting an edge-triggered interrupt signal from an input/output interrupt controller located within a system logic device to a local interrupt controller located within a processor;
- and
- delivering an interrupt pending signal from the processor to a power management unit located within the system logic device.
A method, comprising:
- asserting an edge-triggered interrupt signal from an input/output interrupt controller located within a system logic device to a local interrupt controller located within a processor;
- setting a bit within the processor indicating that an interrupt is pending;
- and
- polling the processor to determine if an interrupt is pending.
1 more element
A system, comprising:
- a processor including a local interrupt controller and an interrupt pending signal output;
- a system logic device including an input/output interrupt controller coupled to the processor, the input/output interrupt controller to deliver an edge-triggered interrupt signal to the processor;
- and
- a power management unit located within the system logic device including an interrupt pending signal input coupled to the interrupt pending signal output of the processor, the processor to assert the interrupt pending signal in response to the delivery of the edge-triggered interrupt signal.
1 more element
Dependencies are inferred from the claim text.