Determination of transmitter distortion
AssigneeBroadcom Corporation
InventorsJohn L. Creigh, Oscar E. Agazzi
Life of this patent
Estimating the term…
Abstract
The present invention provides a method for determining nonlinear distortion of a transmitter. A test symbol sequence is transmitted from the transmitter under test as an analog output signal. The analog output signal is sampled to produce a first sequence which represents the test symbol sequence as distorted by a linear distortion sequence and a nonlinear distortion sequence. The test symbol sequence is filtered via an adaptive filter to produce a second sequence such that the second sequence is approximately equal to the test symbol sequence as distorted by the linear distortion sequence. The second sequence is subtracted from the first sequence to produce an output sequence substantially equal to the nonlinear distortion sequence.
Claims20
A symbol generator for generating a test symbol sequence S(n) for measuring nonlinear distortion of a transmitter under test, characterized by:
- a shift register for generating a set of bit sequences;
- and
- a symbol mapper for mapping the bit sequences to the test symbol sequence;
- wherein the shift register is further characterized by a linear feedback shift register having eleven delay elements to implement the generator polynomial g(s)=1+x9+x11 in GF(2), GF(2) denoting the Galois field of 2.
A system for determining nonlinear distortion of a transmitter, the system characterized by:
- (a) the transmitter transmitting a test symbol sequence S(n), generated for measuring nonlinear distortion of a transmitter under test, as an analog output signal;
- (b) a sampler sampling the analog output signal to produce a first sequence, the first sequence representing a combination of the test symbol sequence, a linear distortion sequence and a nonlinear distortion sequence;
- (c) an adaptive filter filtering at least a portion of the nonlinear distortion sequence from the first sequence to produce a second sequence;
- (d) an adder combining the first sequence and the second sequence;
- and
- (e) wherein the transmitter is further characterized by a symbol generator for generating the test symbol sequence, wherein the symbol generator is further characterized by:
- a symbol mapper for mapping the bit sequences to the test symbol sequence;
- and
- a shift register for generating a set of bit sequences, wherein the shift register is further characterized by a linear feedback shift register having eleven delay elements to implement the generator polynomial g(s)=1+x9+x11 in GF(2), wherein GF(2) denotes the Galois field of 2.
Dependencies are inferred from the claim text.