Video encoder and image processing system using same
AssigneeSony Corporation
InventorAtsushi Hakomori
Life of this patent
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Abstract
A video encoder capable of adjusting output levels and more effectively utilizing performances of later devices, provided with a level adjustment circuit for adjusting output levels of an input luminance signal, color signal, and composite video signal by adding DC offset in accordance with a value set in a register or the like in advance and outputting the same to a display device, and an image processing system using the same.
Claims5
A video encoder for combining a color signal and a luminance signal including a frequency component of the color signal to generate a composite video signal, comprising:
- a level adjustment circuit for adjusting the output level of the generated composite video signal based on a setting value;
- an encoding unit for performing predetermined filtering with respect to an input luminance signal and color signal and modulating the color signal;
- a trap circuit for removing the frequency component of the color signal included in the luminance signal output from the encoding unit and outputting the result;
- a selector for selecting either of the luminance signal output from the encoding unit or the luminance signal output from the trap circuit in accordance with a control signal;
- and
- a combining circuit for combining the luminance signal selected by the selector and the color signal output from the encoding unit to generate the composite video signal,
- wherein the control signal instructs the selector to select the output luminance signal of the trap circuit when the raw video has a large cross-color effect and to select the output luminance signal of the encoding unit when the cross-color effect is small, and
- wherein the trap circuit comprises:
- a band pass filter having a frequency of the carrier of the color signal as a center frequency, and
- a subtractor for subtracting the luminance signal and the output signal of the band pass filter.
An image processing system comprising:
- a video encoder for combining a color signal and a luminance signal including a frequency component of the color signal to generate a composite video signal, the video encoder having a level adjustment circuit for adjusting the output level of the generated composite video signal based on a setting value;
- a storage circuit for storing display data and texture data required by at least one graphic element;
- and
- a logic circuit provided with at least an interpolated data generation circuit for interpolating polygon rendering data of vertexes of a unit graphic to generate interpolated data of a pixel positioned within the unit graphic and a texture processing circuit for dividing homogeneous coordinates (s, t) of texture included in the interpolated data by a homogeneous term q to generate “s/q” and “t/q”, reading the texture data from the storage circuit by using a texture address corresponding to the “s/q” and “t/q”, and performing processing to apply the texture data to a surface of a graphic element of the display data,
- the storage circuit and the logic circuit being accommodated in one semiconductor chip;
- and
- a rendering circuit receiving polygon rendering data including three-dimensional coordinates (x, y, z), R (red), G (green), and B (blue) data, homogeneous coordinates (s, t) of the texture, and the homogeneous term q for vertexes of the unit graphic, performing rendering, and outputting the result to the video encoder.
Dependencies are inferred from the claim text.