Double-sampled integrator system and method thereof
AssigneeFreescale Semiconductor, Inc.
InventorsMerit Y. Hong, Julian G. Ashieri
Life of this patent
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Abstract
A double-sampled feedback integrator system includes a sampling module having multiple switched capacitors. The switched capacitors of the integrator system are opened and closed based upon a polarity of the signal input to the double-sampled feedback integrator system. The integrator system can be used in a sigma-delta converter. A sigma-delta converter includes a double-sampled common-mode correction circuit having multiple switched capacitors to provide common-mode rejection to a system.
Claims30
A method comprising:
- monitoring a differential signal to determine a polarity of the differential signal, the polarity of the differential signal capable of being positive or negative;
- and
- in response to the polarity of the differential signal being negative
- coupling a first terminal of a first capacitive element to a first terminal of an integrator when the first terminal of a differential input is coupled to a second terminal of the first capacitive element;
- and
- coupling the first terminal of the first capacitive element to a second terminal of the integrator when a second terminal of the differential input is coupled to the second terminal of the first capacitive element.
A method comprising:
- receiving a first portion of a first differential signal at a first terminal of a first capacitive element;
- receiving a second portion of the first differential signal at a first terminal of a second capacitive element;
- and
- coupling either the second terminal of the first capacitive element or the second terminal of the second capacitive element to a first input terminal of a differential amplifier based upon the polarity of the differential signal.
A method comprising:
- determining a first value at a first terminal and a second value at a second terminal, where the first terminal and the second terminal are terminals of a different input;
- and
- coupling a first sampling capacitor of a sigma-delta converter stage to one of a first integrator terminal and a second integrator terminal of an integrator of the sigma-delta converter stage based upon the first value and the second value.
A sigma-delta converter stage comprising:
- a differential input comprising a first terminal and a second terminal;
- a first capacitive element comprising a first terminal and a second terminal;
- a differential amplifier comprising a first input terminal and a second input terminal;
- a first switch comprising a first terminal coupled to the first terminal of the first capacitive element and a second terminal coupled to the first terminal of the differential amplifier, and a control terminal;
- a second switch comprising a first terminal coupled to the first terminal of the first capacitive element and a second terminal coupled to the second terminal of the differential amplifier, and a control terminal;
- and
- a control module comprising an input coupled to the differential input, a first output coupled to the control terminal of the first switch, and a second output coupled to the control terminal of the second switch, the first and second outputs to provide a control signals based upon a polarity of the differential input.
A method comprising:
- connecting a first terminal of a first capacitor to a first input of a differential amplifier of an integrator in response to a clock signal being in a first state;
- and
- connecting the first terminal of the first capacitor to receive a signal in response to the clock signal being in a second state;
- connecting a second terminal of the first capacitor to receive the signal in response to the clock signal being in the first state;
- and
- connecting the second terminal of the first capacitor to a second input of the differential amplifier in response to the clock signal being in the second state.
An integration system comprising:
- an integrator comprising a differential amplifier comprising a first differential input and a second differential input;
- and
- a first capacitor comprising a first terminal and a second terminal, the first terminal to be operably coupled to the first differential input of the differential amplifier in response to a clock signal being in a first state, and to be operably coupled to a signal in response to the clock signal being in a second state, the second terminal to be operably coupled to the signal in response to the clock signal being in the first state, and the second terminal to be operably coupled to one of the second differential input or the first differential input in response to the clock signal being in a second state;
- a second capacitor comprising a first terminal and a second terminal, the first terminal to be operably coupled to the second differential input of the differential amplifier in response to a clock signal being in a first state, and to be operably coupled to a signal in response to the clock signal being in a second state, the second terminal to be operably coupled to the signal in response to the clock signal being in a first state, and the second terminal to be operably coupled to one of the first differential input, when the second terminal of the first capacitor is coupled to the second differential input, or the second differential input, when the second terminal of the first capacitor is coupled to the first differential input, in response to the clock signal being in a second state.
Dependencies are inferred from the claim text.