Digitally programmable I/Q phase offset compensation
AssigneeWionics Research
InventorZaw Min Soe
Life of this patent
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Abstract
Delays are produced in differential signals using a variable capacitance provided by MOS varactors coupled between the differential signals. The capacitance values of the MOS varactors is controlled by a bias voltage applied to the bodies of the varactors. Selective application of bias voltages to the MOS varactors may be employed to selectively delay one pair of differential signals with respect to another pair of differential signals so as to change the relative phases of the signals. A logic circuit may be used to control the application of bias voltage to the MOS varactors so that signal phases may be adjusted in a manner that is predictable and programmable. These methods may be implemented to compensate for phase offsets between in-phase and quadrature signals of a local oscillator.
Claims25
A frequency synthesizer circuit comprising:
- a phase locked loop having a voltage controlled oscillator producing an output frequency;
- a frequency divider receiving the output frequency of the voltage controlled oscillator and producing differential in-phase and quadrature signals;
- and
- a phase offset compensation circuit for compensating a phase offset between the in-phase and quadrature signals, the phase offset compensation circuit comprising:
- first pairs of series connected MOS varactors, each pair coupled between transmission lines of said in-phase differential signals;
- a first group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said first pairs of MOS varactors;
- second pairs of series connected MOS varactors, each pair coupled between transmission lines of said quadrature differential signals;
- a second group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said second pairs of MOS varactors;
- and
- a phase offset compensation logic circuit controlling the bias voltage controllers of the first and second groups in response to a phase offset compensation value received by the logic circuit to adjust the relative phases of the in-phase and quadrature signals.
A circuit for modulating or demodulating a signal, comprising:
- a frequency synthesizer circuit producing differential in-phase and quadrature signals;
- a first mixer receiving the differential in-phase signals and first differential input signals and producing first differential output signals;
- a second mixer receiving the differential quadrature signals and second differential input signals and producing second differential output signals;
- and
- a phase offset compensation circuit for compensating a phase offset between the in-phase and quadrature signals, the phase offset compensation circuit comprising:
- first pairs of series connected MOS varactors, each pair coupled between transmission lines of said in-phase differential signals;
- a first group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said first pairs of MOS varactors;
- second pairs of series connected MOS varactors, each pair coupled between transmission lines of said quadrature differential signals;
- a second group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said second pairs of MOS varactors;
- and
- a phase offset compensation logic circuit controlling the bias voltage controllers of the first and second groups in response to a phase offset compensation value received by the logic circuit to adjust the relative phases of the in-phase and quadrature signals.
A phase offset compensation circuit for compensating a phase offset between first and second pairs of differential signals, comprising:
- first pairs of series connected MOS varactors, each pair coupled between transmission lines of a first of said pairs of differential signals;
- a first group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said first pairs of MOS varactors;
- second pairs of series connected MOS varactors, each pair coupled between transmission lines of a second of said pairs of differential signals;
- a second group of bias voltage controllers, each of said bias voltage controllers applying respective bias voltages to bodies of respective sets of said second pairs of MOS varactors;
- and
- a phase offset compensation logic circuit controlling the bias voltage controllers of the first and second groups in response to a phase offset compensation value received by the logic circuit.
A method for compensating phase offset between differential in-phase and quadrature signals of a frequency synthesizer, comprising:
- measuring a phase offset between the differential in-phase and quadrature signals;
- and
- selectively applying bias voltages to bodies of series connected MOS varactors coupled between the transmission lines of respective pairs of the differential in-phase signals and the differential quadrature signals to produce a delay in one of said pair of differential in-phase signals and said pair of differential quadrature signals to compensate said measured phase offset.
Dependencies are inferred from the claim text.