Back to results
US 7,067,898 B1Granted
Semiconductor device having a self-aligned base contact and narrow emitter
AssigneeHRL Laboratories, LLC
InventorsStephen Thomas, III, Yakov Royter
Life of this patent
Estimating the term…
Abstract
A semiconductor structure having a self-aligned base contact and an emitter, where the base contact is electrically isolated from the emitter by a dielectric layer. The separation between the base contact and the emitter is determined by the thickness of the dielectric layer and the width of the emitter is determined by the minimum resolution provided by the fabrication techniques and tools used to define features within the dielectric layer.
Claims20
A semiconductor structure comprising:
- a first semiconductor layer;
- a first semiconductor contact disposed on the first semiconductor layer;
- a dielectric cap on the first semiconductor contact, the first semiconductor contact and the dielectric cap defining an inner portion;
- a second semiconductor layer disposed on the first semiconductor layer in the inner portion;
- and
- a dielectric sidewall disposed in the inner portion between the second semiconductor layer and the first semiconductor contact, wherein the dielectric sidewall electrically isolates the second semiconductor layer from the first semiconductor contact.
3 more elements
A heterojunction bipolar transistor comprising:
- a substrate layer;
- a subcollector layer on the substrate layer;
- a collector layer on the subcollector layer;
- a base layer on the collector;
- one or more base contacts disposed on the base layer;
- one or more dielectric caps disposed on the one or more base contacts;
- an emitter layer disposed on the base layer adjacent the one or more base contacts;
- at least one emitter contact disposed on said emitter layer;
- and
- one or more dielectric sidewalls disposed between the emitter layer and the one or more base contacts, wherein the one or more dielectric sidewalls electrically isolate the emitter layer from the one or more base contacts.
7 more elements
A method of fabricating a semiconductor structure comprising:
- disposing a first semiconductor layer;
- disposing one or more first semiconductor contacts on the first semiconductor layer;
- disposing one or more dielectric caps on the one or more first semiconductor contacts;
- forming one or more recessed areas in the first semiconductor layer to provide one or more raised areas of the first semiconductor layer;
- depositing a dielectric layer on the first semiconductor layer and on the one or more dielectric caps;
- etching a portion of the dielectric layer to expose a portion of the first semiconductor layer adjacent the one or more first semiconductor contacts and leaving a portion of the dielectric layer covering the one or more first semiconductor contacts in a region between the one or more first semiconductor contacts and the exposed portion of the first semiconductor layer;
- and
- depositing a second semiconductor layer on the exposed portion of the first semiconductor layer and adjacent the one or more first semiconductor contacts and the one or more dielectric caps,
- wherein the dielectric layer electrically isolates the one or more first semiconductor contacts from the second semiconductor layer.
6 more elements
Dependencies are inferred from the claim text.